It would much easier to explain F2F with whiteboard and expo. I’ll try…
Physical addresses get asserted to Front Side Bus (FSB). If the target of a transaction is memory, physical addresses are routed to the memory module/bank through the Memory Controller (MC). If the target is device and the address is valid/assigned, the North bridge(NB) or PCIe Root Complex (RC) will claim it and routes to its destination. You can see the activity with an very expensive FSB analyzer on the cpu leads and a bus analyzer on the device side. Only one company I’ve worked for in my 10+ years career as driver programmer can afford such luxury toys – FSB analyzers. They rocks, you’ll learn more than you want to.
Logical Addresses (MSFT terms) are asserted by devices when they act as master agent in a transaction. As a numerical example: let’s say a device wants to do DMA_READ (Mrd in PCI term) from main memory location at 0xdeadbeef (which is the physical address), or in plain English “hey chipset, give me something from memory 0xdeadbeef.”
On systems where physical addr==logical addr, the device will assert 0xdeadbeef on its bus address pins. If you hook up a logic analyzer between the device and bus, you see exactly 0xdeafbeef on the address pins.
On systems where physical addr!=logical addr, there is some sort of address mapping unit (mapped register) that maps the addresses asserted by the device from downstream to system bus signals upstream towards the chipset. The mapping is programmable. For instance, the “mapper” is programmed to map device asserted address 0x123456 to 0xdeadbeef upstream. The mapper will asserts 0xdeadbeef to the chipset upon decoding 0x123456 from the device. The 0xdeadbeef (asserted by the mapper) will eventually get asserted to the memory bank. In this case, 0x123456 is “logical address” and 0xdeadbeef is “physical address”. Or put it simple, in order for the device to access physical memory at location 0xdeadbeef, the device asserts 0x123456 instead. The os has the knowledge of the mapping. In this example, given a physical address of 0xdeadbeef, MapTransfer and buildsgl will give you 0x123456 which your device can assert to address the target physical address. That’s one of several other reasons why we are warned not to use physical address to do DMA.
Again, this is very obvious if you hook up a logic analyzer and/or scope on your device. I used to watch those pins to check signal integrity (raising edge, falling edge, overshoot, rippling, ringing etc) on daily basis. I observed and confirmed the bits and nuts many times to enforce my understanding of what address is what and it became my second nature. Although with PCIe, we don’t see a/d pins but differential pairs being fed to the PCIe PHY, SEDES combo which one can’t decode them directly in time-domain with a scope, but the idea doesn’t change.
I did see ancient NT systems on DEC Alpha where logical!=physical many years ago.
The idea of IOMMU is similar to GART on a modern graphics chips or agp bridges which is another interesting beast. I would coin it “Generic GART”. I thought of building one myself with FPGA to handle zero-copy on receive path without needing L4 offload long before IOMMU was announced-
Wouldn’t just keep dreaming next time.
–
Calvin Guan
NetXtreme II 10Gbps Converged NIC
Broadcom Corporation
Connecting Everything(r)
wrote in message news:xxxxx@ntdev…
>I am reading WDK documentation. The following two topics confused me:
> 1st, Map Registers
> 2nd, Mapping Bus-Relative Addresses to Virtual Addresses
>
> In the first topic, it refers to physical addresses, virtual addresses and device(logical addresses), and in the second topic, it refers to bus-relative addresses. I do understand the physical addresses and virtual addresses, and i think the bus-relative addresses has the same meaning as the device(logical) addresses in the two topics, isn’t it?
>
> For devices are always attached to the system board through certain bus, from device point of view, the addresses it access or be accessed are always bus-relative addresses, but the WDK use two different expressions in two topics make me confirm that they are two different addresses(after all, the documentation is not a novel, it should express the meanings accurately and does not change the expression for the same object without notation)
>
> Thanks in advance.
>