A short question: is the packet-based slave DMA model available for PCI bus? or just for ISA and older busses?
Is any shared DMA controller on the motherboard, or the CPU is doing the memory transfers on PCI bus?
Thanks,
Dan
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No ‘slave DMA’ is specifically for the ISA bus only. This is obsolete legacy
crap - the chips used are a very old design and very slow - and is likely to
not exist on standard PCs in the near future. For PCI busses PC platform
architectures either use the host CPU(s) to perform the transfer operation
(and that is called PIO in the DDK documentation,) or use logic on target
devices to perform transfer operations (and that is called Bus Master DMA
in the DDK documentation.) Theoretically it is possible to use one PCI
device to transfer data to/from host memory and a different PCI device, or
from one PCI device to another without using the host system at all, but
neither of those cases are the ‘normal’ NT model. Finally, PCI devices may
have discrete DMA logic devices, or they may simply have an onboard CPU that
uses ROM or RAM firmware applications to perform transfer operations,. The
specifics of how data transfers are performed is up to the board designer.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Daniel Pop [mailto:xxxxx@optsol.ro]
Sent: Thursday, April 19, 2001 6:09 PM
To: NT Developers Interest List
Subject: [ntdev] Slave DMA
A short question: is the packet-based slave DMA model available for PCI bus?
or just for ISA and older busses?
Is any shared DMA controller on the motherboard, or the CPU is doing the
memory transfers on PCI bus?
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There are both bus master and non-bus-master cards for the PCI bus. The big
difference between master and non-master DMA mode is whether one hogs the
bus with a whole transfer or lets it be interleaved with other transfers.
It’s the old conflict between throughput and response time: a master DMA
transaction that hogs the bus for the duration of the whole transfer will
effectively shut off other peripherals from the bus during that transfer,
and you may get yourself into situations where your sound is slowed down by
your image because the video subsystem ties up the bus more than it should.
I remember reading some stuff from the PCI bus people about limiting the
maximum size of any bus transfer, to prevent abuses of DMA mastering that
impact the system performance for the benefit of one peripheral. Also, I
thought the slow speed of ISA DMA was due to the low clock rate more than
anything else. But I don’t have a real handle on this, anyone out there
knows more ?
Alberto.
-----Original Message-----
From: Roddy, Mark [mailto:xxxxx@stratus.com]
Sent: Friday, April 20, 2001 9:10 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
No ‘slave DMA’ is specifically for the ISA bus only. This is obsolete legacy
crap - the chips used are a very old design and very slow - and is likely to
not exist on standard PCs in the near future. For PCI busses PC platform
architectures either use the host CPU(s) to perform the transfer operation
(and that is called PIO in the DDK documentation,) or use logic on target
devices to perform transfer operations (and that is called Bus Master DMA
in the DDK documentation.) Theoretically it is possible to use one PCI
device to transfer data to/from host memory and a different PCI device, or
from one PCI device to another without using the host system at all, but
neither of those cases are the ‘normal’ NT model. Finally, PCI devices may
have discrete DMA logic devices, or they may simply have an onboard CPU that
uses ROM or RAM firmware applications to perform transfer operations,. The
specifics of how data transfers are performed is up to the board designer.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Daniel Pop [mailto:xxxxx@optsol.ro]
Sent: Thursday, April 19, 2001 6:09 PM
To: NT Developers Interest List
Subject: [ntdev] Slave DMA
A short question: is the packet-based slave DMA model available for PCI bus?
or just for ISA and older busses?
Is any shared DMA controller on the motherboard, or the CPU is doing the
memory transfers on PCI bus?
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In the DDK documentation if the host cpu is doing the transfer it is PIO
rather than ‘non-bus-master DMA’. From a driver writers perspective,
completely different mechanisms are used. Any PCI device that can initiate a
transfer operation is, in the DDK terminology, a bus master. The difference
is who performs the transfer.
I’m not sure you are correct about PCI DMA transfers. My reading of the PCI
specs is that even if a device is performing large transfers, the bus
chipset is supposed to arbitrate between other competing bus requests such
that some sort of fairness is achieved.
Finally yes sure the ‘system DMA’ is no faster than the ISA bus, but the
chips were designed with the ISA bus’s speed transfer size, and address
capabilities in mind, so the system DMA chips are no better than the ISA
bus. Anyway, they are wired to the ISA bus not the PCI bus.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Moreira, Alberto [mailto:xxxxx@compuware.com]
Sent: Friday, April 20, 2001 10:13 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
There are both bus master and non-bus-master cards for the PCI bus. The big
difference between master and non-master DMA mode is whether one hogs the
bus with a whole transfer or lets it be interleaved with other transfers.
It’s the old conflict between throughput and response time: a master DMA
transaction that hogs the bus for the duration of the whole transfer will
effectively shut off other peripherals from the bus during that transfer,
and you may get yourself into situations where your sound is slowed down by
your image because the video subsystem ties up the bus more than it should.
I remember reading some stuff from the PCI bus people about limiting the
maximum size of any bus transfer, to prevent abuses of DMA mastering that
impact the system performance for the benefit of one peripheral. Also, I
thought the slow speed of ISA DMA was due to the low clock rate more than
anything else. But I don’t have a real handle on this, anyone out there
knows more ?
Alberto.
-----Original Message-----
From: Roddy, Mark [mailto:xxxxx@stratus.com]
Sent: Friday, April 20, 2001 9:10 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
No ‘slave DMA’ is specifically for the ISA bus only. This is obsolete legacy
crap - the chips used are a very old design and very slow - and is likely to
not exist on standard PCs in the near future. For PCI busses PC platform
architectures either use the host CPU(s) to perform the transfer operation
(and that is called PIO in the DDK documentation,) or use logic on target
devices to perform transfer operations (and that is called Bus Master DMA
in the DDK documentation.) Theoretically it is possible to use one PCI
device to transfer data to/from host memory and a different PCI device, or
from one PCI device to another without using the host system at all, but
neither of those cases are the ‘normal’ NT model. Finally, PCI devices may
have discrete DMA logic devices, or they may simply have an onboard CPU that
uses ROM or RAM firmware applications to perform transfer operations,. The
specifics of how data transfers are performed is up to the board designer.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Daniel Pop [mailto:xxxxx@optsol.ro]
Sent: Thursday, April 19, 2001 6:09 PM
To: NT Developers Interest List
Subject: [ntdev] Slave DMA
A short question: is the packet-based slave DMA model available for PCI bus?
or just for ISA and older busses?
Is any shared DMA controller on the motherboard, or the CPU is doing the
memory transfers on PCI bus?
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The bus protocol doesn’t know the difference between DMA and any other
transfer. Anyone driving the bus is a bus “master”, the device asserts the
REQ# line and waits for a GNT# line. What people call “pio” is when the CPU
is the bus master and seizes control of the bus. When a peripheral asserts
the REQ# line to do a transfer, to memory or to another peripheral, that’s
DMA.
But note, there’s a difference between what the PCI bus protocol calls a
“bus master” - which is the initiator of any bus transfer - and what people
in the PC world have grown used to call “DMA Master Mode”, which is seizing
control of the bus for the entire duration of the transfer.
The PCI bus cycle has, after arbitration, one address phase and multiple
data phases. The issue then is, if I have, say, a 4096-byte transfer, do I
seize the bus for 1024 cycles or do I break it down into smaller chunks ?
This is not done at software level, this is a hardware thing: the term “bus
mastering” came from the old isa world where such a transfer was done in one
burst: the controller seized control of the bus, thus becoming the “master”.
A controller that does not release the bus until it terminates its transfer
The PCI arbitration is the same for any transfer, and involves handling of
the REQ# and GNT# lines. In fact, arbitration can take place while another
cycle is going on. But once a transfer is complete, I believe it is not
finished until the initiator drops its FRAME# and IRDY# signals, unless the
new versions of the PCI protocol have some preemption mechanism I’m not
aware of. So, I believe that the length of the transfer is under direct
control of the initiator. But I don’t have a good handle, is there some
video or IDE developer out there who can shed more light on this ?
If I remember well, DMA on the ISA bus was done at 3Mhz, and later at 4Mhz.
The standard PCI bus runs as 33Mhz, and it makes no difference between DMA
and any other bus transfer. So, if nothing else, the PCI bus is severalfold
faster. The issue then becomes, for how long does the initiator hold the bus
? Devices called “bus masters” in the PC industry seize control of the bus
for the duration of the transfer. Non-bus-master mode devices break it in
chunks, such as 16 at a time or so. Of course, holding the bus for the
duration of the transfer makes that individual transaction much faster, but
that’s done at the expense of other peripherals that must wait till the bus
is available before their own transfers are honored.
You can take a look at http://www.pcisig.org http: ,
there’s plenty of good information in there.
Alberto.
-----Original Message-----
From: Roddy, Mark [mailto:xxxxx@stratus.com]
Sent: Friday, April 20, 2001 10:33 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
In the DDK documentation if the host cpu is doing the transfer it is PIO
rather than ‘non-bus-master DMA’. From a driver writers perspective,
completely different mechanisms are used. Any PCI device that can initiate a
transfer operation is, in the DDK terminology, a bus master. The difference
is who performs the transfer.
I’m not sure you are correct about PCI DMA transfers. My reading of the PCI
specs is that even if a device is performing large transfers, the bus
chipset is supposed to arbitrate between other competing bus requests such
that some sort of fairness is achieved.
Finally yes sure the ‘system DMA’ is no faster than the ISA bus, but the
chips were designed with the ISA bus’s speed transfer size, and address
capabilities in mind, so the system DMA chips are no better than the ISA
bus. Anyway, they are wired to the ISA bus not the PCI bus.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Moreira, Alberto [mailto:xxxxx@compuware.com]
Sent: Friday, April 20, 2001 10:13 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
There are both bus master and non-bus-master cards for the PCI bus. The big
difference between master and non-master DMA mode is whether one hogs the
bus with a whole transfer or lets it be interleaved with other transfers.
It’s the old conflict between throughput and response time: a master DMA
transaction that hogs the bus for the duration of the whole transfer will
effectively shut off other peripherals from the bus during that transfer,
and you may get yourself into situations where your sound is slowed down by
your image because the video subsystem ties up the bus more than it should.
I remember reading some stuff from the PCI bus people about limiting the
maximum size of any bus transfer, to prevent abuses of DMA mastering that
impact the system performance for the benefit of one peripheral. Also, I
thought the slow speed of ISA DMA was due to the low clock rate more than
anything else. But I don’t have a real handle on this, anyone out there
knows more ?
Alberto.
-----Original Message-----
From: Roddy, Mark [mailto:xxxxx@stratus.com]
Sent: Friday, April 20, 2001 9:10 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
No ‘slave DMA’ is specifically for the ISA bus only. This is obsolete legacy
crap - the chips used are a very old design and very slow - and is likely to
not exist on standard PCs in the near future. For PCI busses PC platform
architectures either use the host CPU(s) to perform the transfer operation
(and that is called PIO in the DDK documentation,) or use logic on target
devices to perform transfer operations (and that is called Bus Master DMA
in the DDK documentation.) Theoretically it is possible to use one PCI
device to transfer data to/from host memory and a different PCI device, or
from one PCI device to another without using the host system at all, but
neither of those cases are the ‘normal’ NT model. Finally, PCI devices may
have discrete DMA logic devices, or they may simply have an onboard CPU that
uses ROM or RAM firmware applications to perform transfer operations,. The
specifics of how data transfers are performed is up to the board designer.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Daniel Pop [mailto:xxxxx@optsol.ro]
Sent: Thursday, April 19, 2001 6:09 PM
To: NT Developers Interest List
Subject: [ntdev] Slave DMA
A short question: is the packet-based slave DMA model available for PCI bus?
or just for ISA and older busses?
Is any shared DMA controller on the motherboard, or the CPU is doing the
memory transfers on PCI bus?
Thanks,
Dan
—
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I am actually not disagreeing with what you are saying, other than that
within the context of NT device drivers, PIO and DMA are completely
different programming models. The fact that the host CPU is a bus master
device on the PCI bus just confuses things from the programmers perspective,
as the DDK documentation insists on referring to this as PIO. I didn’t
invent the terminology, but we all have to live with it.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Moreira, Alberto [mailto:xxxxx@compuware.com]
Sent: Friday, April 20, 2001 10:58 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
The bus protocol doesn’t know the difference between DMA and any other
transfer. Anyone driving the bus is a bus “master”, the device asserts the
REQ# line and waits for a GNT# line. What people call “pio” is when the CPU
is the bus master and seizes control of the bus. When a peripheral asserts
the REQ# line to do a transfer, to memory or to another peripheral, that’s
DMA.
But note, there’s a difference between what the PCI bus protocol calls a
“bus master” - which is the initiator of any bus transfer - and what people
in the PC world have grown used to call “DMA Master Mode”, which is seizing
control of the bus for the entire duration of the transfer.
The PCI bus cycle has, after arbitration, one address phase and multiple
data phases. The issue then is, if I have, say, a 4096-byte transfer, do I
seize the bus for 1024 cycles or do I break it down into smaller chunks ?
This is not done at software level, this is a hardware thing: the term “bus
mastering” came from the old isa world where such a transfer was done in one
burst: the controller seized control of the bus, thus becoming the “master”.
A controller that does not release the bus until it terminates its transfer
The PCI arbitration is the same for any transfer, and involves handling of
the REQ# and GNT# lines. In fact, arbitration can take place while another
cycle is going on. But once a transfer is complete, I believe it is not
finished until the initiator drops its FRAME# and IRDY# signals, unless the
new versions of the PCI protocol have some preemption mechanism I’m not
aware of. So, I believe that the length of the transfer is under direct
control of the initiator. But I don’t have a good handle, is there some
video or IDE developer out there who can shed more light on this ?
If I remember well, DMA on the ISA bus was done at 3Mhz, and later at 4Mhz.
The standard PCI bus runs as 33Mhz, and it makes no difference between DMA
and any other bus transfer. So, if nothing else, the PCI bus is severalfold
faster. The issue then becomes, for how long does the initiator hold the bus
? Devices called “bus masters” in the PC industry seize control of the bus
for the duration of the transfer. Non-bus-master mode devices break it in
chunks, such as 16 at a time or so. Of course, holding the bus for the
duration of the transfer makes that individual transaction much faster, but
that’s done at the expense of other peripherals that must wait till the bus
is available before their own transfers are honored.
You can take a look at http://www.pcisig.org http: ,
there’s plenty of good information in there.
Alberto.
-----Original Message-----
From: Roddy, Mark [mailto:xxxxx@stratus.com]
Sent: Friday, April 20, 2001 10:33 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
In the DDK documentation if the host cpu is doing the transfer it is PIO
rather than ‘non-bus-master DMA’. From a driver writers perspective,
completely different mechanisms are used. Any PCI device that can initiate a
transfer operation is, in the DDK terminology, a bus master. The difference
is who performs the transfer.
I’m not sure you are correct about PCI DMA transfers. My reading of the PCI
specs is that even if a device is performing large transfers, the bus
chipset is supposed to arbitrate between other competing bus requests such
that some sort of fairness is achieved.
Finally yes sure the ‘system DMA’ is no faster than the ISA bus, but the
chips were designed with the ISA bus’s speed transfer size, and address
capabilities in mind, so the system DMA chips are no better than the ISA
bus. Anyway, they are wired to the ISA bus not the PCI bus.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Moreira, Alberto [mailto:xxxxx@compuware.com]
Sent: Friday, April 20, 2001 10:13 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
There are both bus master and non-bus-master cards for the PCI bus. The big
difference between master and non-master DMA mode is whether one hogs the
bus with a whole transfer or lets it be interleaved with other transfers.
It’s the old conflict between throughput and response time: a master DMA
transaction that hogs the bus for the duration of the whole transfer will
effectively shut off other peripherals from the bus during that transfer,
and you may get yourself into situations where your sound is slowed down by
your image because the video subsystem ties up the bus more than it should.
I remember reading some stuff from the PCI bus people about limiting the
maximum size of any bus transfer, to prevent abuses of DMA mastering that
impact the system performance for the benefit of one peripheral. Also, I
thought the slow speed of ISA DMA was due to the low clock rate more than
anything else. But I don’t have a real handle on this, anyone out there
knows more ?
Alberto.
-----Original Message-----
From: Roddy, Mark [mailto:xxxxx@stratus.com]
Sent: Friday, April 20, 2001 9:10 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Slave DMA
No ‘slave DMA’ is specifically for the ISA bus only. This is obsolete legacy
crap - the chips used are a very old design and very slow - and is likely to
not exist on standard PCs in the near future. For PCI busses PC platform
architectures either use the host CPU(s) to perform the transfer operation
(and that is called PIO in the DDK documentation,) or use logic on target
devices to perform transfer operations (and that is called Bus Master DMA
in the DDK documentation.) Theoretically it is possible to use one PCI
device to transfer data to/from host memory and a different PCI device, or
from one PCI device to another without using the host system at all, but
neither of those cases are the ‘normal’ NT model. Finally, PCI devices may
have discrete DMA logic devices, or they may simply have an onboard CPU that
uses ROM or RAM firmware applications to perform transfer operations,. The
specifics of how data transfers are performed is up to the board designer.
Mark Roddy
xxxxx@hollistech.com
www.hollistech.com
603 321 1032
WindowsNT Windows 2000 Consulting Services
-----Original Message-----
From: Daniel Pop [mailto:xxxxx@optsol.ro]
Sent: Thursday, April 19, 2001 6:09 PM
To: NT Developers Interest List
Subject: [ntdev] Slave DMA
A short question: is the packet-based slave DMA model available for PCI bus?
or just for ISA and older busses?
Is any shared DMA controller on the motherboard, or the CPU is doing the
memory transfers on PCI bus?
Thanks,
Dan
—
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>Finally yes sure the ‘system DMA’ is no faster than the ISA bus, but the chips were designed
with the ISA bus’s speed transfer size, and address capabilities in mind, so the system DMA
chips are no better than the ISA bus. Anyway, they are wired to the ISA bus not the PCI bus.
SB16 soundcard used the ISA slave DMA.
So, the task of emulating the SB16 (for backward compatibility) on a modern PCI soundcard is not trivial.
SBLive! uses the Win9x’s VMM abilities to provide a virtual DMA driver for the DOS boxes, thus emulating the SB16. This does not work on NT and w2k.
Nevertheless, the Aureal Vortex card provides the SB16 and DMA emulation in hardware only, without the software VMM-based solution. Its emulation can work in raw DOS.
So, looks like there is a way on PCI to use the ISA slave DMA.
Max
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