Question on Page Directories in PAE

Hi ALL,

I was going through Mark E. Russinovich, windows internal book, and i was trying to understand Address translation. In PAE mode we have four Page directories each with 8 byte entry, but i coudn’t understand the relation that Process Page Directory which is mapped at 0xC0600000. Is 0xC0600000 the base address of the first Page Directory. Please help this novice.

Thanks

Ashish


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Yes, the c0600000 is the base PDE address, it’s for PAE mode.
For non-PAE mode, c0300000 is the base. Basically these base
addresses are fixed in kernel.

AFei

“ashish singh” wrote in message news:xxxxx@ntdev…
Hi ALL,
I was going through Mark E. Russinovich, windows internal book, and i was
trying to understand Address translation. In PAE mode we have four Page
directories each with 8 byte entry, but i coudn’t understand the relation
that Process Page Directory which is mapped at 0xC0600000. Is 0xC0600000 the
base address of the first Page Directory. Please help this novice.
Thanks
Ashish

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With PAE:

  • PTEs are 64bit
  • pages are 4KB
  • so, 512 PTEs per PT, each PT describing 2MB of virtual address space
  • 512 PTs per PD, each PD describing 1GB of virtual address space
  • 4 PDs in the root descriptor, describing all 4GB of virtual address space

And, as in non-PAE case, one of the PDEs is back-pointing to its PD itself. This means automatic aliasing of the PD to one of the PTs, thus all PDEs to PTEs in some range, thus - all PTs to data pages in some range. The PD itself is also a PT, and is at 0xC0600000.

Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com
----- Original Message -----
From: ashish singh
To: Windows System Software Devs Interest List
Sent: Thursday, April 07, 2005 3:44 AM
Subject: [ntdev] Question on Page Directories in PAE

Hi ALL,

I was going through Mark E. Russinovich, windows internal book, and i was trying to understand Address translation. In PAE mode we have four Page directories each with 8 byte entry, but i coudn’t understand the relation that Process Page Directory which is mapped at 0xC0600000. Is 0xC0600000 the base address of the first Page Directory. Please help this novice.

Thanks

Ashish


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Get yourself a copy of the Pentium hardware book. It’s a free
download from the Intel web site. It’s all explained in there,
with nice diagrams to show the way it works!

Alberto.

----- Original Message -----
From: “AFei”
Newsgroups: ntdev
To: “Windows System Software Devs Interest List”

Sent: Wednesday, April 06, 2005 11:20 PM
Subject: Re:[ntdev] Question on Page Directories in PAE

> Yes, the c0600000 is the base PDE address, it’s for PAE mode.
> For non-PAE mode, c0300000 is the base. Basically these base
> addresses are fixed in kernel.
>
> AFei
>
> “ashish singh” wrote in message
> news:xxxxx@ntdev…
> Hi ALL,
> I was going through Mark E. Russinovich, windows internal
> book, and i was trying to understand Address translation. In
> PAE mode we have four Page directories each with 8 byte entry,
> but i coudn’t understand the relation that Process Page
> Directory which is mapped at 0xC0600000. Is 0xC0600000 the
> base address of the first Page Directory. Please help this
> novice.
> Thanks
> Ashish
>
> __________________________________________________
> Do You Yahoo!?
> Tired of spam? Yahoo! Mail has the best spam protection around
> http://mail.yahoo.com
>
>
> —
> Questions? First check the Kernel Driver FAQ at
> http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@ieee.org
> To unsubscribe send a blank email to
> xxxxx@lists.osr.com

Thanks for the reply AFei, but in PAE mode there are four Page Directory table, If c0600000 is the base address of the the first Page directory table than what is the base address of the other Page directory tables, or all the four Page Directory table are contiguous in memory.

Thanks
Ashish

AFei wrote:
Yes, the c0600000 is the base PDE address, it’s for PAE mode.
For non-PAE mode, c0300000 is the base. Basically these base
addresses are fixed in kernel.

AFei

“ashish singh” wrote in message news:xxxxx@ntdev…
Hi ALL,
I was going through Mark E. Russinovich, windows internal book, and i was
trying to understand Address translation. In PAE mode we have four Page
directories each with 8 byte entry, but i coudn’t understand the relation
that Process Page Directory which is mapped at 0xC0600000. Is 0xC0600000 the
base address of the first Page Directory. Please help this novice.
Thanks
Ashish

__________________________________________________
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Questions? First check the Kernel Driver FAQ at http://www.osronline.com/article.cfm?id=256

You are currently subscribed to ntdev as: xxxxx@yahoo.com
To unsubscribe send a blank email to xxxxx@lists.osr.com

---------------------------------
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You should probably ask yourself, "How many PDT is active in the system at a given point in time?. Who are the register( or registers if more than one ) holds the PDT(s) ? This will lead you to an answer !

-pro
----- Original Message -----
From: ashish singh
To: Windows System Software Devs Interest List
Sent: Thursday, April 07, 2005 7:59 AM
Subject: Re:[ntdev] Question on Page Directories in PAE

Thanks for the reply AFei, but in PAE mode there are four Page Directory table, If c0600000 is the base address of the the first Page directory table than what is the base address of the other Page directory tables, or all the four Page Directory table are contiguous in memory.

Thanks
Ashish

AFei wrote:
Yes, the c0600000 is the base PDE address, it’s for PAE mode.
For non-PAE mode, c0300000 is the base. Basically these base
addresses are fixed in kernel.

AFei

“ashish singh” wrote in message news:xxxxx@ntdev…
Hi ALL,
I was going through Mark E. Russinovich, windows internal book, and i was
trying to understand Address translation. In PAE mode we have four Page
directories each with 8 byte entry, but i coudn’t understand the relation
that Process Page Directory which is mapped at 0xC0600000. Is 0xC0600000 the
base address of the first Page Directory. Please help this novice.
Thanks
Ashish

__________________________________________________
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http://mail.yahoo.com


Questions? First check the Kernel Driver FAQ at http://www.osronline.com/article.cfm?id=256

You are currently subscribed to ntdev as: xxxxx@yahoo.com
To unsubscribe send a blank email to xxxxx@lists.osr.com

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Maybe the following codes can help you understand the PDT & PTE layout, it’s
from my test project and it’s for non-PAE mode. As Sinha said, these are
well documented in Intel’s manual. Rgds.

#define PAGEENTRY ULONG
#define PPAGEENTRY PULONG

#define PROCESS_PAGE_TABLES 0xC0000000
#define PROCESS_PAGE_DIRECTORY 0xC0300000

PPAGEENTRY MiVirtualToPTE( DWORD dwVirtualAddress )
{
PAGEENTRY pde = NULL;
PPAGEENTRY pte = NULL;
pde = ((PPAGEENTRY)PROCESS_PAGE_DIRECTORY)[dwVirtualAddress>>22];
if( pde & MM_PTE_VALID_MASK )
{
pte = (PPAGEENTRY)( (DWORD)PROCESS_PAGE_TABLES + ( ( dwVirtualAddress >>
22 ) * PAGESIZE ) + ( ( ( dwVirtualAddress >> 12 ) & 0x3FF ) *
sizeof(PAGEENTRY) ) );
if( pte && ( *pte & MM_PTE_VALID_MASK ) ) return pte;
}
return NULL;
}

PPAGEENTRY MiVirtualToPDE( DWORD dwVirtualAddress )
{
PPAGEENTRY pde = NULL;
pde = &((PPAGEENTRY)PROCESS_PAGE_DIRECTORY)[dwVirtualAddress>>22];
if( pde && ( *pde & MM_PTE_VALID_MASK ) )
{
return pde;
}
return NULL;
}