Reading PLX9x5x KMDF sample, I am trying to find hardware device reference to understand what happens in the program. I already downloaded a lot of documents from www.plxtech.com site, but none of them doesn’t contain required information. For example, what is the source of PCI9656_REGS structure.
Does such document exist and available for download? Maybe it is supplied only together with PLX9656-LITE board? I didn’t buy it yet and try to understand whether this sample is OK for me.
Maybe somebody has this board and can point me to right direction. Thank you.
PLX 9054, 9056, 9080, 9656 are all basically compatible with each other.
All of them have 2 independent DMA channels.
The difference between the chips is mostly performance, depth of FIFO stack and so on.
From the host software point of view the chips are almost identical.
I am not familiar with PLX9x5x KMDF samples, but most probably PCI9656_REGS refer
to run-timer registers. All run-timer registers are mapped to BAR0 and BAR1.
BAR0 is a memory range, BAR1 is an IO range.
It does not matter if you access the registers through BAR0 or BAR1, usually,
you’ll find the IO BAR just redundant.
Also note that there is a development software that is shipped along with PLX9656-LITE
board. So you have alternatives, beside the KMDF sample.
To OP:
The document you are looking for is “PCI9656 Data Book”; you can download it from PLX Technology site ( http://www.plxtech.com/products/io/pci9656.asp ), if it is not included as part of your evaluation board. PCI9656_REGS structure represents Local Configuration Registers, Runtime registers and DMA registers.
Thank you, this is information I was looking for.