Can a wdm driver request a warm fundamental reset to its PCIe device?
The device’s performance goes down after a disable/enable. Instead of figuring out every
detail, I want to see if a broad reset at load time can fix the issue.
I have not worked on PCI drivers since the days of NT 4.0. I have been working on
lesser buses: usb and sdio.
thanks,
xxxxx@yahoo.com wrote:
Can a wdm driver request a warm fundamental reset to its PCIe device?
There’s no such thing as a “warm fundamental reset” in PCIe. Some
devices have a bit in a register that triggers an on-board reset, but
you’d have to look at your own device specs to find that. Remember that
you don’t want the device to lose its configuration space.
The device’s performance goes down after a disable/enable. Instead of figuring out every
detail, I want to see if a broad reset at load time can fix the issue.
Well, that wouldn’t really “fix” the issue. It would only hide it.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
I think OP wants PERST# (routed to LANE#1 if done) assert to his card
without power cycling. ICH or MCH assert PERST# after main power applied
and stable. I don’t think OP can fool the upstream device to generate
PERST#. A bridge FDO can write to its “Secondary bus reset” to broadcast
PRST# (not PERST#) to trigger hot reset to all downstream devices. PRST#
triggers “hot reset” which is different from Fundamental Reset.
However, device can generate its own PERST# if it’s designed to do so. I
agree with Tim that I would root cause the perf problem.
Calvin
Sent from my PC on WIN8
On Fri, Dec 7, 2012 at 12:13 PM, Tim Roberts wrote:
> xxxxx@yahoo.com wrote:
> > Can a wdm driver request a warm fundamental reset to its PCIe device?
>
> There’s no such thing as a “warm fundamental reset” in PCIe. Some
> devices have a bit in a register that triggers an on-board reset, but
> you’d have to look at your own device specs to find that. Remember that
> you don’t want the device to lose its configuration space.
>
>
> > The device’s performance goes down after a disable/enable. Instead of
> figuring out every
> > detail, I want to see if a broad reset at load time can fix the issue.
>
> Well, that wouldn’t really “fix” the issue. It would only hide it.
>
> –
> Tim Roberts, xxxxx@probo.com
> Providenza & Boekelheide, Inc.
>
>
> —
> NTDEV is sponsored by OSR
>
> For our schedule of WDF, WDM, debugging and other seminars visit:
> http://www.osr.com/seminars
>
> To unsubscribe, visit the List Server section of OSR Online at
> http://www.osronline.com/page.cfm?name=ListServer
>
Some chips can be reset just by a D3->D0 transition, which your driver may be able to accomplish (if it’s not a miniport of some sort.) And some other chips implement Function-Level reset, which is somewhat stronger than a D3->D0 transition.
If I had to reset a chip, I’d put it in D3hot and then issue the FLR. Then I’d move the driver back to D0. Resetting in any state other than D3hot is going to lead to very odd results in the PCI driver.
From: xxxxx@lists.osr.com [mailto:xxxxx@lists.osr.com] On Behalf Of Calvin Guan (news)
Sent: Friday, December 7, 2012 1:07 PM
To: Windows System Software Devs Interest List
Subject: Re: [ntdev] PCIe reset
I think OP wants PERST# (routed to LANE#1 if done) assert to his card without power cycling. ICH or MCH assert PERST# after main power applied and stable. I don’t think OP can fool the upstream device to generate PERST#. A bridge FDO can write to its “Secondary bus reset” to broadcast PRST# (not PERST#) to trigger hot reset to all downstream devices. PRST# triggers “hot reset” which is different from Fundamental Reset.
However, device can generate its own PERST# if it’s designed to do so. I agree with Tim that I would root cause the perf problem.
Calvin
Sent from my PC on WIN8
On Fri, Dec 7, 2012 at 12:13 PM, Tim Roberts > wrote:
xxxxx@yahoo.commailto:xxxxx wrote:
> Can a wdm driver request a warm fundamental reset to its PCIe device?
There’s no such thing as a “warm fundamental reset” in PCIe. Some
devices have a bit in a register that triggers an on-board reset, but
you’d have to look at your own device specs to find that. Remember that
you don’t want the device to lose its configuration space.
> The device’s performance goes down after a disable/enable. Instead of figuring out every
> detail, I want to see if a broad reset at load time can fix the issue.
Well, that wouldn’t really “fix” the issue. It would only hide it.
–
Tim Roberts, xxxxx@probo.commailto:xxxxx
Providenza & Boekelheide, Inc.
—
NTDEV is sponsored by OSR
For our schedule of WDF, WDM, debugging and other seminars visit:
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— NTDEV is sponsored by OSR For our schedule of WDF, WDM, debugging and other seminars visit: http://www.osr.com/seminars To unsubscribe, visit the List Server section of OSR Online at http://www.osronline.com/page.cfm?name=ListServer</mailto:xxxxx></mailto:xxxxx>
Define disable/enable. It might be useful to use a bus analyzer to see if
some weird state is being set to the chip. I don’t know if WinDbg can do
it, but the old SoftICE could break on port writes, and I found this
invaluable in tracking down manydriver problems I wascalled in to fix.
joe
Can a wdm driver request a warm fundamental reset to its PCIe device?
The device’s performance goes down after a disable/enable. Instead of
figuring out every
detail, I want to see if a broad reset at load time can fix the issue.I have not worked on PCI drivers since the days of NT 4.0. I have been
working on
lesser buses: usb and sdio.thanks,
NTDEV is sponsored by OSR
For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminarsTo unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer
I didn’t have time to clarify this question. I was once called in to
consult on a driver which was having serious performance problems. After
the interrupts had been disabled, the device’s throughput dropped
drastically. The client was unable to determine the problem, and asked me
to help.
I studied the code. Interrupts were disabled, but never re-enabled. The
original programmer thought that interrupts were being lost, so added a
timeout that would complete the I/O request (it wasn’t a Windows driver,
but that’s a minor detail) with whatever data was available (programmed
I/O: one byte at most). It took me a long time to find this one. When I
said “Why aren’t you enabling interrupts?” the question got me One Of
Those Looks and the programmer said “You mean they aren’t automatically
enabled when I start an I/O operation?” Apparently he had asked the
previous programmer and gotten the same bad information. So when I said
“define enable/disable” there are many things can happen. If you disable
the device from the device manager plugin, then there should be a sequence
of IRPs that deal with shutting it down, and you can trace these to see
what they are, then examine the code to see what they are doing. If you
are disabling /interrupts/ at some point, don’t forget to re-enable them.
[The original programmer noticed that sometimes the device “hung” because
no interrupts were occurring; rather than figure out what was wrong, the
timeout routine was added. This factoid was not explained to the new
programmer]
OTOH, our printer controller frequently forgot to interrupt the computer
when it had finished printing a line, and we had to add a timeout. It was
frightening to hear it print after this: WHIRR, WHIRR, WHIRR, (pause),
WHIRR,…30 or so…WHIRR, (pause) and so on. As best we could tell, the
interface was completely flaky. But a printer is a slow device, and
timeouts aren’t nearly as bad as if it had been, say, a network card.
joe
Define disable/enable. It might be useful to use a bus analyzer to see if
some weird state is being set to the chip. I don’t know if WinDbg can do
it, but the old SoftICE could break on port writes, and I found this
invaluable in tracking down manydriver problems I wascalled in to fix.
joe> Can a wdm driver request a warm fundamental reset to its PCIe device?
> The device’s performance goes down after a disable/enable. Instead of
> figuring out every
> detail, I want to see if a broad reset at load time can fix the issue.
>
> I have not worked on PCI drivers since the days of NT 4.0. I have been
> working on
> lesser buses: usb and sdio.
>
> thanks,
>
>
>
>
> —
> NTDEV is sponsored by OSR
>
> For our schedule of WDF, WDM, debugging and other seminars visit:
> http://www.osr.com/seminars
>
> To unsubscribe, visit the List Server section of OSR Online at
> http://www.osronline.com/page.cfm?name=ListServer
>
NTDEV is sponsored by OSR
For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminarsTo unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer
On 12/8/12, xxxxx@flounder.com
I don’t know if WinDbg can do it, but the old SoftICE could break on
port writes
it is documented that access break point can break on io like below
ba i for x86 kernelmode
ba i4 0x3f8
though iirc when i tried playing with it in portio sample it didnt seem to work