+1
I’ve encountered a number of designs where they carefully say “this is a
16-bit value” but then don’t indicate they only work on 32-bit accesses.
When you ask after beating your head against the wall, they state “it should
have been obvious”
Don Burn
Windows Filesystem and Driver Consulting
Website: http://www.windrvr.com
Blog: http://msmvps.com/blogs/WinDrvr
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Tim Roberts
Sent: Monday, May 05, 2014 5:47 PM
To: Windows System Software Devs Interest List
Subject: Re: [ntdev] PCI Express Data Writes
xxxxx@gdls.com wrote:
I am running into an issue using WRITE_REGISTER_USHORT. It seems to be
corrupting the upper or lower 16 bits depending on where I am writing to in
the 32 bit word. I modified the code to perform a ULONG write and it worked
fine. Is the minimum PCIE data length 4 bytes?
Not at all, but it’s entirely possible that your hardware has such a
limitation Many hardware designers ignore the byte-enables because
it’s hard.
I am amazed at the number of hardware engineers who blithely make alignment
assumptions and then forget to document them. “Oh, didn’t I tell you? All
DMA transfers have to be 32-byte aligned.”
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
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