PCI Burst Reads / Writes

NTDEV
1

All,

First, a gracious thank you to all who posted to my question about 64-bit PCI accesses on 32-bit Windows. You’re helping a PCI driver newbie learn MUCH. We’re currently designing and implementing a DMA core to add to the PCI target FPGA to attempt to achieve DMA with 64-bit accesses for writing and reading very large buffers.

Anyways, in the mean time I’m attempting to initiate PCI burst reads and writes. I’ve tried using READ_REGISTER_BUFFER_ULONG() and WRITE_REGISTER_BUFFER_ULONG() to read/write 64 words. Using Chipscope on the FPGA, I’m finding that the system is doing a new address cycle IN BETWEEN EACH WORD! This of course slows the accesses to less than 50% of the speed I would get out of a burst.

So does anybody know how to initiate a read or write burst? Of course using DMA can achieve this, but this is a pain for such small bursts (I expect to be doing bursts from 16 bytes to 256 bytes for configuring interfaces in the hardware).

Thank you, and best regards.
Ryan

2

It is up to the chipset what happens with READ/WRITE_REGISTER_BUFFER_XXXX.
The hal will do its best to convince optimal host initiated transfers, but
that is all it can do, and there is nothing much more you can do. DMA works
better.

I think we have discussed this repeatedly on this list - search for PCI and
any message on that topic from Jake Oshins at MSFT.

Mark Roddy

On Thu, Aug 5, 2010 at 5:05 PM, wrote:

> All,
>
> First, a gracious thank you to all who posted to my question about 64-bit
> PCI accesses on 32-bit Windows. You’re helping a PCI driver newbie learn
> MUCH. We’re currently designing and implementing a DMA core to add to the
> PCI target FPGA to attempt to achieve DMA with 64-bit accesses for writing
> and reading very large buffers.
>
> Anyways, in the mean time I’m attempting to initiate PCI burst reads and
> writes. I’ve tried using READ_REGISTER_BUFFER_ULONG() and
> WRITE_REGISTER_BUFFER_ULONG() to read/write 64 words. Using Chipscope on
> the FPGA, I’m finding that the system is doing a new address cycle IN
> BETWEEN EACH WORD! This of course slows the accesses to less than 50% of
> the speed I would get out of a burst.
>
> So does anybody know how to initiate a read or write burst? Of course
> using DMA can achieve this, but this is a pain for such small bursts (I
> expect to be doing bursts from 16 bytes to 256 bytes for configuring
> interfaces in the hardware).
>
> Thank you, and best regards.
> Ryan
>
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3

xxxxx@lmco.com wrote:

Anyways, in the mean time I’m attempting to initiate PCI burst reads and writes. I’ve tried using READ_REGISTER_BUFFER_ULONG() and WRITE_REGISTER_BUFFER_ULONG() to read/write 64 words. Using Chipscope on the FPGA, I’m finding that the system is doing a new address cycle IN BETWEEN EACH WORD! This of course slows the accesses to less than 50% of the speed I would get out of a burst.

So does anybody know how to initiate a read or write burst? Of course using DMA can achieve this, but this is a pain for such small bursts (I expect to be doing bursts from 16 bytes to 256 bytes for configuring interfaces in the hardware).

Mark is right. Remember that the processor doesn’t know anything about
bursts. That’s a bus concept, not a processor concept. It’s just doing
individual memory cycles. It is POSSIBLE for the root complex to notice
that you’re doing a long sequence and convert it into a burst, but
that’s difficult, and in my experience is simply not done.

So, to four decimal places, the ONLY way to get bursts is to have your
device do bus mastering.

Also remember that most motherboard chipsets don’t allow 256-byte
packets. Desktop chipsets are usually limited to 64, while server
chipsets allow 128.

–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.

4

Thanks, it sounds like I’ll have to live with DWORD cycles for the smaller accesses.

Regards,
Ryan

5

>64 words. Using Chipscope on the FPGA, I’m finding that the system is doing a new address cycle IN

BETWEEN EACH WORD!

This is a usual and normal behaviour. That’s why people use DMA.

Have you tried to MmMapIoSpace the address range with MmWriteCombined? what would Chipscope say in this case?

So does anybody know how to initiate a read or write burst?
Of course using DMA can achieve this,

Surely, and this is the only reliable way.

CPU’s/north bridges are very, very much limited in their ability of initiating bursts.

but this is a pain for such small bursts

Most PCI hardware modern days uses DMA not only for data, but for its “program” too. The driver only assembles the “program” in the common buffer bytewise, and then pushes the “program start” address to the device’s register. The rest is done via DMA.

Look at OHCI 1394 spec (>10 years old, but sorry, your design is even older) for a good sample.

–
Maxim S. Shatskih
Windows DDK MVP
xxxxx@storagecraft.com
http://www.storagecraft.com

6

Maxim,

Not to revive this thread after a week, but we were just able to test your thought today with calling MMapIoSpace using the MwWriteCombined flag. According to Chipscope, a new address phase still occurs with each word. Good thought though, it was worth a shot.

I would still love to do burst reads writes, but it sounds like we’ll have to just rely on the DMA for any sort of burst. Maybe go with the common buffer approach like you suggested…

Thanks,
Ryan