Needt to access northbridge chip, is "portio" example the best one to get started

Need to control the SMI registers in the Northbridge chip, can i use the portio example.
After i can find the address for Northbridge chip, read/write to the SMI offset ?

Thanks for help !

OK, I’ll ask it first…

Uh…Why?

In other words, what is it you are ultimately trying to accomplish as opposed to the mechanism you have chosen to get to your end goal??

xxxxx@hotmail.com wrote:

From: xxxxx@hotmail.com
To: “Windows System Software Devs Interest List”
Subject: [ntdev] Needt to access northbridge chip, is “portio” example the best one to get started
Date: Mon, 9 Aug 2010 16:12:00 -0400 (EDT)

Need to control the SMI registers in the Northbridge chip, can i use the portio example.
After i can find the address for Northbridge chip, read/write to the SMI offset ?

Thanks for help !


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oh, we are guessing SMI is slowing down the system clock.
What we see is the system clock has some latencies.

So want to disable some of the SMI signals, to see if the clock can come back normal.

So assuming that this is an experiment for a platform you control, yes you
could just access, experimentally, the IO ports you need to access using HAL
port IO operations. Unless you also control for other entities doing the
same thing you risk conflicting operations to these ports, but this is like
an experiment for debugging, right?

Mark Roddy

On Mon, Aug 9, 2010 at 4:27 PM, wrote:

> oh, we are guessing SMI is slowing down the system clock.
> What we see is the system clock has some latencies.
>
> So want to disable some of the SMI signals, to see if the clock can come
> back normal.
>
> —
> NTDEV is sponsored by OSR
>
> For our schedule of WDF, WDM, debugging and other seminars visit:
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>
> To unsubscribe, visit the List Server section of OSR Online at
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>

yes, this is just an experiment/internal tool, trying to see if SMI signals are causing latency.
This is not going to be a release product.

xxxxx@hotmail.com wrote:

yes, this is just an experiment/internal tool, trying to see if SMI signals are causing latency.
This is not going to be a release product.

It is not impossible that SMI is adjusting the clock speed, but if it is
doing so, it’s doing so for a reason. On a desktop system, that
typically means the temperature is going up. Overriding those checks is
going to put your system in danger.


Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.

I know it’s dangerous to play with SMI, people are already doing this in linux, we just want to run a quick test, hopefully won’t harm the CPU.

The question is:

  1. how to get the the address of the northbridge chip (where SMI sits ?)
  2. i’m confused by the name of portio, so in this case, SMI register is a port register or memory mapped register ? Basically is portio example the correct sample to start ?

thanks !

xxxxx@hotmail.com wrote:

The question is:

  1. how to get the the address of the northbridge chip (where SMI sits ?)

Well, you need to KNOW this. If you’re considering playing with the SMI
registers, I assume you have done a little investigation into the
documentation for your northbridge, so you can figure out how to locate
the appropriate registers. Some of them are on PCI configuration
space. Some of them are I/O ports.

  1. i’m confused by the name of portio, so in this case, SMI register is a port register or memory mapped register ? Basically is portio example the correct sample to start ?

Again, you need to KNOW whether you want to talk to an I/O port or
memory-mapped space. The PortIO sample is designed to talk to I/O
ports, which would use the “in” and “out” instructions of the x86. If
that’s what you need, you’re in luck. If not, then you’ll need to
modify the driver.


Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.

All of this information is chipset specific - see your chipset docs.

Good luck,

mm

-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of xxxxx@hotmail.com
Sent: Monday, August 09, 2010 6:17 PM
To: Windows System Software Devs Interest List
Subject: RE:[ntdev] Needt to access northbridge chip, is “portio” example
the best one to get started

I know it’s dangerous to play with SMI, people are already doing this in
linux, we just want to run a quick test, hopefully won’t harm the CPU.

The question is:

  1. how to get the the address of the northbridge chip (where SMI sits ?) 2.
    i’m confused by the name of portio, so in this case, SMI register is a port
    register or memory mapped register ? Basically is portio example the correct
    sample to start ?

thanks !


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer

Do you have any evidence to indicate that SMM is in fact part of the
problem? The thing is, you’re going down a road that is kind of messy, and
you’re lacking basic knowledge about SMM, so I’m wondering why you’re
looking there, at least first.

Good luck,

mm

-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of xxxxx@hotmail.com
Sent: Monday, August 09, 2010 6:17 PM
To: Windows System Software Devs Interest List
Subject: RE:[ntdev] Needt to access northbridge chip, is “portio” example
the best one to get started

I know it’s dangerous to play with SMI, people are already doing this in
linux, we just want to run a quick test, hopefully won’t harm the CPU.

The question is:

  1. how to get the the address of the northbridge chip (where SMI sits ?) 2.
    i’m confused by the name of portio, so in this case, SMI register is a port
    register or memory mapped register ? Basically is portio example the correct
    sample to start ?

thanks !


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer

Yeah, my assumption was that the OP had one of those yellow covered manuals
with the red stamps all over it. Otherwise, this is a fishing expedition in
the dark without lights in a leaky boat in a storm.

Mark Roddy

On Mon, Aug 9, 2010 at 7:35 PM, M. M. O’Brien <
xxxxx@gmail.com> wrote:

All of this information is chipset specific - see your chipset docs.

Good luck,

mm

-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of xxxxx@hotmail.com
Sent: Monday, August 09, 2010 6:17 PM
To: Windows System Software Devs Interest List
Subject: RE:[ntdev] Needt to access northbridge chip, is “portio” example
the best one to get started

I know it’s dangerous to play with SMI, people are already doing this in
linux, we just want to run a quick test, hopefully won’t harm the CPU.

The question is:

  1. how to get the the address of the northbridge chip (where SMI sits ?) 2.
    i’m confused by the name of portio, so in this case, SMI register is a port
    register or memory mapped register ? Basically is portio example the
    correct
    sample to start ?

thanks !


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer

Indeed, though sometimes this information can be found in the public docs.

mm

On Aug 10, 2010 12:39 PM, “Mark Roddy” wrote:

Yeah, my assumption was that the OP had one of those yellow covered manuals
with the red stamps all over it. Otherwise, this is a fishing expedition in
the dark without lights in a leaky boat in a storm.

Mark Roddy

On Mon, Aug 9, 2010 at 7:35 PM, M. M. O’Brien <
xxxxx@gmail.com> wrote:
>
> All of th…
— NTDEV is sponsored by OSR For our schedule of WDF, WDM, debugging and
other seminars visit: http://www.osr.com/seminars To unsubscribe, visit the
List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer

Guys, search for “how to program SMI registers”, you’ll see plenty of patches in linux.
Though i’m still doing some search.

Basically SMI screwed real time systems a lot.

I differ here - read the chipset docs first, and of course the ia docs as
well. There is nothing standard about accessing smm - it is entirely
chipset specific.

mm

On Aug 10, 2010 2:18 PM, wrote:

Guys, search for “how to program SMI registers”, you’ll see plenty of
patches in linux.
Though i’m still doing some search.

Basically SMI screwed real time systems a lot.



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http:/…

wrote in message news:xxxxx@ntdev…
> Guys, search for “how to program SMI registers”, you’ll see plenty of
> patches in linux.
> Though i’m still doing some search.
>
> Basically SMI screwed real time systems a lot.
>

In Windows this is not an issue, as Windows is not a real time OS.

–pa