MessageMark,
How do you go about measuring the the performance? It sounds like you must
have some pretty good techniques in your bag of tricks.
-Evan Hillman
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Roddy, Mark
Sent: Tuesday, October 16, 2001 10:57 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Number of processing DPC objects
If you do as suggested by Evan and if your hardware has N independent IO
channels, then you are essentially serializing access to what would
otherwise be concurrent data paths. For example I have a plx9054 pci device
I fool around with at home. It has, at a minimum, two independent DMA
channels. Using the disable-in-isr enable-in-dpc approach achieves almost
exactly half the throughput of the deserialized dpc approach, up to some
level of saturation where either channel is able to consume all the
bandwidth by itself. (To be clearer, the effect is most noticeable where
small transfers are performed and DMA setup time is the dominant factor. For
large transfers the DMA transfer operation itself dominates and the setup
time and serialization is not terribly important.) I agree with Vipul that
the ISR ought to record the state, queue the dpc, and then re-enable the
next interrupt. Generally this is not a lot of extra processing in the ISR -
read some data, store it somewhere, and it allows for parallel performance
on MP platforms for your driver lower edge.
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