actually the issue i am facing is like this.
I am observing a crash when i am updating my serial driver. On crash dump
analysis i am observing that the crash occurred in ISR while it is trying
to read a register using READ_REGISTER_UCHAR. Crash dump analysis says that
i tried to access NULL or completely invalid memory address at ISR level.
In the serial driver , during ReleaseHardware i am unmapping the system
memory that i allocated in PrepareHardWare. I am also making sure that
particular variable is set to NULL after memory is unmapped.
This crash is not happening in any other case so i think the address that i
am passing to READ_REGISTER_UCHAR is valid all the time. But only during
update somehow it is being invalid.
*Here is the design of my driver:*
.
I have two separate drivers. One controller driver for driving the
controller and a serial driver which controls all the ports on that
controller. Hence there will be multiple instances of serial port driver
whose device contexts will be passed to the controller driver and stored
during installation of serial drivers. these will be cleared during
uninstallation of serial driver.
During installation of the serial driver i am enabling the interrupts on
the serial port. because of this the serial port generates an interrupt
which results in controller driver ISR being called. Controller ISR checks
for an interrupt status register (using the mapped memory address passed to
it by port driver during initialization of the driver) and and calls a
function in serial port driver which does the actual job the servicing the
interrupt.
*More details on the issue:*
During updating a serial driver i am observing the crash of during the
READ_REGISTER_UCHAR function (which is protected by NULL checks for the
variables which hold the memory mapped addresses of serial driver). So the
address which i am passing to READ_REGISTER_UCHAR is not being NULL but it
is invalid.
I am unable to understand why this address could be invalid. The interrupt
should be generated only after i enabled the interrupts on the serial port
which requires me to write to a memory mapped register. That means i have
successfully mapped the serial port physical memory to virtual memory and
have a valid range of memory addresses with me.
J.S.R.Sarma.
9916109893.
On Sat, Aug 9, 2014 at 5:43 AM, wrote:
> Yes, this is right. I should have stated that though an ISR has a thread
> context, it is in fact the thread context of the CPU that the ISR is
> interrupting. The ISR is thus a code path, like a thread. The ISR gains
> execution because of a hardware event while a thread is created and
> scheduled by the OS.
>
> —
> NTDEV is sponsored by OSR
>
> Visit the list at: http://www.osronline.com/showlists.cfm?list=ntdev
>
> OSR is HIRING!! See http://www.osr.com/careers
>
> For our schedule of WDF, WDM, debugging and other seminars visit:
> http://www.osr.com/seminars
>
> To unsubscribe, visit the List Server section of OSR Online at
> http://www.osronline.com/page.cfm?name=ListServer
>