Is it possible that the same DPCs can get queued on multiple processors at
the same time?
Background:
I have a piece of HW that queues commands. I can get an interrupt, spin a
DPC, then when I start processing the DPC another interrupt may fire. Is
there a chance that this second interrupt may queue its DPC on a second
processor, causing the two DPCs to execute simultaneously?
Thanks,
Daniel Nemiroff
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Some time ago, Nemiroff, Daniel wrote…
I have a piece of HW that queues commands. I can get an interrupt, spin a
DPC, then when I start processing the DPC another interrupt may fire. Is
there a chance that this second interrupt may queue its DPC on a second
processor, causing the two DPCs to execute simultaneously?
Most certainly.
-kkm
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Daniel,
I’d say you are guaranteed to have DPCs running on both processors if a
second interrupt happens while the first DPC is being serviced.
There was a discussion about this recently. I favored disabling the
interrupt in the ISR and re-enabling it in the DPC, but greater minds felt
that the more noble route is to set up the ISR and DPC to allow the DPC to
execute on multiple processors.
-Evan
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Nemiroff, Daniel
Sent: Friday, October 19, 2001 3:29 PM
To: NT Developers Interest List
Subject: [ntdev] DPCs getting queued on multiple processors
Is it possible that the same DPCs can get queued on multiple processors at
the same time?
Background:
I have a piece of HW that queues commands. I can get an interrupt, spin a
DPC, then when I start processing the DPC another interrupt may fire. Is
there a chance that this second interrupt may queue its DPC on a second
processor, causing the two DPCs to execute simultaneously?
Thanks,
Daniel Nemiroff
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Actually this just goes to show you how easily email debates are
misinterpreted. I have been convinced by you and Dave Harvey and others,
that at least for some hardware, setting the shutup-bit on in the isr
and turning it off in the dpc may actually improve performance, for a
variety of non-obvious reasons.
Ships crossing in the night, eh?
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Evan Hillman
Sent: Friday, October 19, 2001 6:43 PM
To: NT Developers Interest List
Subject: [ntdev] RE: DPCs getting queued on multiple processors
Daniel,
I’d say you are guaranteed to have DPCs running on both
processors if a second interrupt happens while the first DPC
is being serviced.
There was a discussion about this recently. I favored
disabling the interrupt in the ISR and re-enabling it in the
DPC, but greater minds felt that the more noble route is to
set up the ISR and DPC to allow the DPC to execute on
multiple processors.
-Evan
> -----Original Message-----
> From: xxxxx@lists.osr.com
> [mailto:xxxxx@lists.osr.com]On Behalf Of Nemiroff, Daniel
> Sent: Friday, October 19, 2001 3:29 PM
> To: NT Developers Interest List
> Subject: [ntdev] DPCs getting queued on multiple processors
>
>
> Is it possible that the same DPCs can get queued on multiple
> processors at the same time?
>
> Background:
> I have a piece of HW that queues commands. I can get an interrupt,
> spin a DPC, then when I start processing the DPC another
interrupt may
> fire. Is there a chance that this second interrupt may
queue its DPC
> on a second processor, causing the two DPCs to execute
simultaneously?
>
> Thanks,
>
> Daniel Nemiroff
>
> —
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Gosh Daniel, where have you been. We just spent a week bantering this one
back and forth.
Yes … which is why synchronization and serialization is so bloody
important in the SMP world. You can CPU B coming up your 6 while CPU A is
running the same DPC. Unless the DPC grabs a spinlock and releases when it’s
done.
Gary
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Nemiroff, Daniel
Sent: Friday, October 19, 2001 2:29 PM
To: NT Developers Interest List
Subject: [ntdev] DPCs getting queued on multiple processors
Is it possible that the same DPCs can get queued on multiple processors at
the same time?
Background:
I have a piece of HW that queues commands. I can get an interrupt, spin a
DPC, then when I start processing the DPC another interrupt may fire. Is
there a chance that this second interrupt may queue its DPC on a second
processor, causing the two DPCs to execute simultaneously?
Thanks,
Daniel Nemiroff
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How about enqueuing the interrupts, and only kicking a DPC when the queue is
empty at enqueuing time ? The DPC will then empty the queue and go away. Or
better, if queued interrupt handling is so important, just leave the DPC
alive, kick it alive once per boot.
Alberto.
-----Original Message-----
From: Evan Hillman [mailto:xxxxx@home.com]
Sent: Friday, October 19, 2001 6:43 PM
To: NT Developers Interest List
Subject: [ntdev] RE: DPCs getting queued on multiple processors
Daniel,
I’d say you are guaranteed to have DPCs running on both processors if a
second interrupt happens while the first DPC is being serviced.
There was a discussion about this recently. I favored disabling the
interrupt in the ISR and re-enabling it in the DPC, but greater minds felt
that the more noble route is to set up the ISR and DPC to allow the DPC to
execute on multiple processors.
-Evan
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Nemiroff, Daniel
Sent: Friday, October 19, 2001 3:29 PM
To: NT Developers Interest List
Subject: [ntdev] DPCs getting queued on multiple processors
Is it possible that the same DPCs can get queued on multiple processors at
the same time?
Background:
I have a piece of HW that queues commands. I can get an interrupt, spin a
DPC, then when I start processing the DPC another interrupt may fire. Is
there a chance that this second interrupt may queue its DPC on a second
processor, causing the two DPCs to execute simultaneously?
Thanks,
Daniel Nemiroff
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> Is it possible that the same DPCs can get queued on multiple processors at
the same time?
Yes, it is possible.
Max
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Good idea.
In this case, DPC must loop, consuming the queue entries and processing them.
The queue must be guarded by the interrupt spinlock, and DPC must use KeSynchronizeExecution to consume.
Allocating memory for queue entries is another problem.
Max
----- Original Message -----
From: “Moreira, Alberto”
To: “NT Developers Interest List”
Sent: Monday, October 22, 2001 6:19 PM
Subject: [ntdev] RE: DPCs getting queued on multiple processors
> How about enqueuing the interrupts, and only kicking a DPC when the queue is
> empty at enqueuing time ? The DPC will then empty the queue and go away. Or
> better, if queued interrupt handling is so important, just leave the DPC
> alive, kick it alive once per boot.
>
> Alberto.
>
> -----Original Message-----
> From: Evan Hillman [mailto:xxxxx@home.com]
> Sent: Friday, October 19, 2001 6:43 PM
> To: NT Developers Interest List
> Subject: [ntdev] RE: DPCs getting queued on multiple processors
>
>
> Daniel,
>
> I’d say you are guaranteed to have DPCs running on both processors if a
> second interrupt happens while the first DPC is being serviced.
>
> There was a discussion about this recently. I favored disabling the
> interrupt in the ISR and re-enabling it in the DPC, but greater minds felt
> that the more noble route is to set up the ISR and DPC to allow the DPC to
> execute on multiple processors.
>
> -Evan
>
> > -----Original Message-----
> > From: xxxxx@lists.osr.com
> > [mailto:xxxxx@lists.osr.com]On Behalf Of Nemiroff, Daniel
> > Sent: Friday, October 19, 2001 3:29 PM
> > To: NT Developers Interest List
> > Subject: [ntdev] DPCs getting queued on multiple processors
> >
> >
> > Is it possible that the same DPCs can get queued on multiple processors at
> > the same time?
> >
> > Background:
> > I have a piece of HW that queues commands. I can get an interrupt, spin a
> > DPC, then when I start processing the DPC another interrupt may fire. Is
> > there a chance that this second interrupt may queue its DPC on a second
> > processor, causing the two DPCs to execute simultaneously?
> >
> > Thanks,
> >
> > Daniel Nemiroff
> >
> > —
> > You are currently subscribed to ntdev as: xxxxx@home.com
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> >
>
>
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Also, you can’t really just ‘leave the dpc alive’ as it is running at
DISPATCH_LEVEL, and as such it can’t wait and can’t get pre-empted.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Maxim
S. Shatskih
Sent: Monday, October 22, 2001 3:47 PM
To: NT Developers Interest List
Subject: [ntdev] RE: DPCs getting queued on multiple processors
Good idea.
In this case, DPC must loop, consuming the queue entries and
processing them. The queue must be guarded by the interrupt
spinlock, and DPC must use KeSynchronizeExecution to consume.
Allocating memory for queue entries is another problem.
Max
----- Original Message -----
From: “Moreira, Alberto”
> To: “NT Developers Interest List”
> Sent: Monday, October 22, 2001 6:19 PM
> Subject: [ntdev] RE: DPCs getting queued on multiple processors
>
>
> > How about enqueuing the interrupts, and only kicking a DPC when the
> > queue is empty at enqueuing time ? The DPC will then empty
> the queue
> > and go away. Or better, if queued interrupt handling is so
> important,
> > just leave the DPC alive, kick it alive once per boot.
> >
> > Alberto.
> >
> > -----Original Message-----
> > From: Evan Hillman [mailto:xxxxx@home.com]
> > Sent: Friday, October 19, 2001 6:43 PM
> > To: NT Developers Interest List
> > Subject: [ntdev] RE: DPCs getting queued on multiple processors
> >
> >
> > Daniel,
> >
> > I’d say you are guaranteed to have DPCs running on both
> processors if
> > a second interrupt happens while the first DPC is being serviced.
> >
> > There was a discussion about this recently. I favored
> disabling the
> > interrupt in the ISR and re-enabling it in the DPC, but
> greater minds
> > felt that the more noble route is to set up the ISR and DPC
> to allow
> > the DPC to execute on multiple processors.
> >
> > -Evan
> >
> > > -----Original Message-----
> > > From: xxxxx@lists.osr.com
> > > [mailto:xxxxx@lists.osr.com]On Behalf Of
> Nemiroff, Daniel
> > > Sent: Friday, October 19, 2001 3:29 PM
> > > To: NT Developers Interest List
> > > Subject: [ntdev] DPCs getting queued on multiple processors
> > >
> > >
> > > Is it possible that the same DPCs can get queued on multiple
> > > processors at the same time?
> > >
> > > Background:
> > > I have a piece of HW that queues commands. I can get an
> interrupt,
> > > spin a DPC, then when I start processing the DPC another
> interrupt
> > > may fire. Is there a chance that this second interrupt may queue
> > > its DPC on a second processor, causing the two DPCs to execute
> > > simultaneously?
> > >
> > > Thanks,
> > >
> > > Daniel Nemiroff
> > >
> > > —
> > > You are currently subscribed to ntdev as: xxxxx@home.com To
> > > unsubscribe send a blank email to leave-ntdev-$subst(‘Recip.MemberIDChar’)@lists.osr.com
> > >
> >
> >
> > —
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> >
>
>
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----- Original Message -----
From: “Maxim S. Shatskih”
To: “NT Developers Interest List”
Sent: Monday, October 22, 2001 3:46 PM
Subject: [ntdev] RE: DPCs getting queued on multiple processors
> Good idea.
>
> In this case, DPC must loop, consuming the queue entries and processing them.
> The queue must be guarded by the interrupt spinlock, and DPC must use KeSynchronizeExecution to consume.
> Allocating memory for queue entries is another problem.
You can use a fixed size circular buffer to queue interrupts if you know the maximum queue size.
Single producer (ISR)/ single consumer (DPC) require no locks on the queue pointers,
and you can use an
if (InterlockedExchange(&xxxxx, 1) ==0) {…}
to avoid queueing the DPC twice.
Therefore the only spin lock you get is the kernel lock for the CPU’s DPC queue
amortized across some number of interrupts. I think the kernel will get some
other spin lock per interrupt before it called the driver, and ensures that two interrupts
from the same device will not be presented simultaneously (but perhaps its ScsiPort that
does this).
The DPC looks like
do {
while (prodP != consumerP) {
…
}
} while (InterlockedExchange(&xxxxx,0) ==1);
You can queue things to the ISR in a similar manner, so long as you serialize the enqueue,
and use KeSynchronizeExecution to get the ISR code going it was idle.
-DH
>
> Max
>
> ----- Original Message -----
> From: “Moreira, Alberto”
> To: “NT Developers Interest List”
> Sent: Monday, October 22, 2001 6:19 PM
> Subject: [ntdev] RE: DPCs getting queued on multiple processors
>
>
> > How about enqueuing the interrupts, and only kicking a DPC when the queue is
> > empty at enqueuing time ? The DPC will then empty the queue and go away. Or
> > better, if queued interrupt handling is so important, just leave the DPC
> > alive, kick it alive once per boot.
> >
> > Alberto.
> >
> > -----Original Message-----
> > From: Evan Hillman [mailto:xxxxx@home.com]
> > Sent: Friday, October 19, 2001 6:43 PM
> > To: NT Developers Interest List
> > Subject: [ntdev] RE: DPCs getting queued on multiple processors
> >
> >
> > Daniel,
> >
> > I’d say you are guaranteed to have DPCs running on both processors if a
> > second interrupt happens while the first DPC is being serviced.
> >
> > There was a discussion about this recently. I favored disabling the
> > interrupt in the ISR and re-enabling it in the DPC, but greater minds felt
> > that the more noble route is to set up the ISR and DPC to allow the DPC to
> > execute on multiple processors.
> >
> > -Evan
> >
> > > -----Original Message-----
> > > From: xxxxx@lists.osr.com
> > > [mailto:xxxxx@lists.osr.com]On Behalf Of Nemiroff, Daniel
> > > Sent: Friday, October 19, 2001 3:29 PM
> > > To: NT Developers Interest List
> > > Subject: [ntdev] DPCs getting queued on multiple processors
> > >
> > >
> > > Is it possible that the same DPCs can get queued on multiple processors at
> > > the same time?
> > >
> > > Background:
> > > I have a piece of HW that queues commands. I can get an interrupt, spin a
> > > DPC, then when I start processing the DPC another interrupt may fire. Is
> > > there a chance that this second interrupt may queue its DPC on a second
> > > processor, causing the two DPCs to execute simultaneously?
> > >
> > > Thanks,
> > >
> > > Daniel Nemiroff
> > >
> > > —
> > > You are currently subscribed to ntdev as: xxxxx@home.com
> > > To unsubscribe send a blank email to leave-ntdev-$subst(‘Recip.MemberIDChar’)@lists.osr.com
> > >
> >
> >
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> >
>
>
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Surely, the DPC must return if the mentioned queue is empty.
----- Original Message -----
From: “Mark Roddy”
To: “NT Developers Interest List”
Sent: Tuesday, October 23, 2001 2:23 AM
Subject: [ntdev] RE: DPCs getting queued on multiple processors
> Also, you can’t really just ‘leave the dpc alive’ as it is running at
> DISPATCH_LEVEL, and as such it can’t wait and can’t get pre-empted.
>
> > -----Original Message-----
> > From: xxxxx@lists.osr.com
> > [mailto:xxxxx@lists.osr.com] On Behalf Of Maxim
> > S. Shatskih
> > Sent: Monday, October 22, 2001 3:47 PM
> > To: NT Developers Interest List
> > Subject: [ntdev] RE: DPCs getting queued on multiple processors
> >
> >
> > Good idea.
> >
> > In this case, DPC must loop, consuming the queue entries and
> > processing them. The queue must be guarded by the interrupt
> > spinlock, and DPC must use KeSynchronizeExecution to consume.
> > Allocating memory for queue entries is another problem.
> >
> > Max
> >
> > ----- Original Message -----
> > From: “Moreira, Alberto”
> > To: “NT Developers Interest List”
> > Sent: Monday, October 22, 2001 6:19 PM
> > Subject: [ntdev] RE: DPCs getting queued on multiple processors
> >
> >
> > > How about enqueuing the interrupts, and only kicking a DPC when the
> > > queue is empty at enqueuing time ? The DPC will then empty
> > the queue
> > > and go away. Or better, if queued interrupt handling is so
> > important,
> > > just leave the DPC alive, kick it alive once per boot.
> > >
> > > Alberto.
> > >
> > > -----Original Message-----
> > > From: Evan Hillman [mailto:xxxxx@home.com]
> > > Sent: Friday, October 19, 2001 6:43 PM
> > > To: NT Developers Interest List
> > > Subject: [ntdev] RE: DPCs getting queued on multiple processors
> > >
> > >
> > > Daniel,
> > >
> > > I’d say you are guaranteed to have DPCs running on both
> > processors if
> > > a second interrupt happens while the first DPC is being serviced.
> > >
> > > There was a discussion about this recently. I favored
> > disabling the
> > > interrupt in the ISR and re-enabling it in the DPC, but
> > greater minds
> > > felt that the more noble route is to set up the ISR and DPC
> > to allow
> > > the DPC to execute on multiple processors.
> > >
> > > -Evan
> > >
> > > > -----Original Message-----
> > > > From: xxxxx@lists.osr.com
> > > > [mailto:xxxxx@lists.osr.com]On Behalf Of
> > Nemiroff, Daniel
> > > > Sent: Friday, October 19, 2001 3:29 PM
> > > > To: NT Developers Interest List
> > > > Subject: [ntdev] DPCs getting queued on multiple processors
> > > >
> > > >
> > > > Is it possible that the same DPCs can get queued on multiple
> > > > processors at the same time?
> > > >
> > > > Background:
> > > > I have a piece of HW that queues commands. I can get an
> > interrupt,
> > > > spin a DPC, then when I start processing the DPC another
> > interrupt
> > > > may fire. Is there a chance that this second interrupt may queue
> > > > its DPC on a second processor, causing the two DPCs to execute
> > > > simultaneously?
> > > >
> > > > Thanks,
> > > >
> > > > Daniel Nemiroff
> > > >
> > > > —
> > > > You are currently subscribed to ntdev as: xxxxx@home.com To
> > > > unsubscribe send a blank email to leave-ntdev-$subst(‘Recip.MemberIDChar’)@lists.osr.com
> > > >
> > >
> > >
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>
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> > In this case, DPC must loop, consuming the queue entries and processing them.
> The queue must be guarded by the interrupt spinlock, and DPC must use KeSynchronizeExecution to consume.
> Allocating memory for queue entries is another problem.
You can use a fixed size circular buffer to queue interrupts if you know the maximum queue size.
Single producer (ISR)/ single consumer (DPC) require no locks on the queue pointers,
Remember that the DPC can be interrupted by its own ISR.
Max
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