DMA missing bytes

NTDEV
1

I am doing DMA for ISA bus device using sytem DMA channel 0 for W2K and
beyond. On transfer I’m seeing that on every byte the next byte is missing.
I have checked the value for AlignmentRequirement on AddDevice for byte
alignment. I have not tried on receive side yet. I’ll hook a bus analyser
soon to analyse the bus signals. Before doing that could you share your
experience in this regard? I have had a look in archive but nothing relates
to my probelm.

Thanks,
Hakim

2

Sounds like 16bit DMA when 8bits is all it handles. Check that the DmaWidth
field is set correctly, and check the hardware spec for the device.

=====================
Mark Roddy

-----Original Message-----
From: Hakim [mailto:xxxxx@yahoo.ca]
Sent: Monday, August 23, 2004 1:55 PM
To: Windows System Software Devs Interest List
Subject: [ntdev] DMA missing bytes

I am doing DMA for ISA bus device using sytem DMA channel 0 for W2K and
beyond. On transfer I’m seeing that on every byte the next byte is missing.
I have checked the value for AlignmentRequirement on AddDevice for byte
alignment. I have not tried on receive side yet. I’ll hook a bus analyser
soon to analyse the bus signals. Before doing that could you share your
experience in this regard? I have had a look in archive but nothing relates
to my probelm.

Thanks,
Hakim

Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256

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3

Shooting from the hip-- is it possible the DMA is occurring as 16 bits,
but your device is only using 8 bits?

Chuck

----- Original Message -----
From: “Hakim”
Newsgroups: ntdev
To: “Windows System Software Devs Interest List”
Sent: Tuesday, August 24, 2004 12:54 AM
Subject: [ntdev] DMA missing bytes

>I am doing DMA for ISA bus device using sytem DMA channel 0 for W2K and
> beyond. On transfer I’m seeing that on every byte the next byte is
> missing.
> I have checked the value for AlignmentRequirement on AddDevice for
> byte
> alignment. I have not tried on receive side yet. I’ll hook a bus
> analyser
> soon to analyse the bus signals. Before doing that could you share
> your
> experience in this regard? I have had a look in archive but nothing
> relates
> to my probelm.
>
> Thanks,
> Hakim

4

Thanks to both Chuck Batson and Mark Roddy.
I have set the dmawidth to 8 bits.
I also suspect that something missing about 16bit and 8 bit DMA.
Could you point some bus signals I should look around to identify the
problem? Hardware PLD may have problem also.

Hakim.

“Hakim” wrote in message news:xxxxx@ntdev…
> I am doing DMA for ISA bus device using sytem DMA channel 0 for W2K and
> beyond. On transfer I’m seeing that on every byte the next byte is
missing.
> I have checked the value for AlignmentRequirement on AddDevice for byte
> alignment. I have not tried on receive side yet. I’ll hook a bus analyser
> soon to analyse the bus signals. Before doing that could you share your
> experience in this regard? I have had a look in archive but nothing
relates
> to my probelm.
>
> Thanks,
> Hakim
>
>
>

5

> Could you point some bus signals I should look around to identify the

problem? Hardware PLD may have problem also.

I don’t remember their names any more, but there are two WR/ signals on the
ISA bus, one for 8 bits and one for either 16 bits or the upper 8 bits, I
forget which. On a 16 bit write certainly the 16 bit write signal should be
active, and maybe both should be.

Loren

6

If memory serves me correctly, I think it’s the IOCS16 and the MEMCS16
signals that the peripheral must assert in order for the system to recognize
it (the peripheral) as a 16 bit device (in other words, don’t do things like
activate the byte swapping lane for odd bytes if asserted). When /SBHE
(System Byte High Enable) is asserted, the system is accessing data on the
high byte. Additionally, I believe (this means I’m not sure) /MEMR, /MEMW
are the memory decodes for the 1MB boundary and beyond (up to 16MB). /SMEMR
and /SMEMW are the memory decodes below the 1MB boundary.

Motz

“Loren Wilton” wrote in message news:xxxxx@ntdev…
>> Could you point some bus signals I should look around to identify the
>> problem? Hardware PLD may have problem also.
>
> I don’t remember their names any more, but there are two WR/ signals on
> the
> ISA bus, one for 8 bits and one for either 16 bits or the upper 8 bits, I
> forget which. On a 16 bit write certainly the 16 bit write signal should
> be
> active, and maybe both should be.
>
> Loren
>
>

7

Thanks all for good suggestions.

After comparision with some signals it was found that one of the signals
from the card was too long that hamers the next byte transfer. After fixing
the signal width in hardware PLD everything is fine.

Hakim

“Hakim” wrote in message news:xxxxx@ntdev…
> Thanks to both Chuck Batson and Mark Roddy.
> I have set the dmawidth to 8 bits.
> I also suspect that something missing about 16bit and 8 bit DMA.
> Could you point some bus signals I should look around to identify the
> problem? Hardware PLD may have problem also.
>
> Hakim.
>
> “Hakim” wrote in message news:xxxxx@ntdev…
> > I am doing DMA for ISA bus device using sytem DMA channel 0 for W2K and
> > beyond. On transfer I’m seeing that on every byte the next byte is
> missing.
> > I have checked the value for AlignmentRequirement on AddDevice for byte
> > alignment. I have not tried on receive side yet. I’ll hook a bus
analyser
> > soon to analyse the bus signals. Before doing that could you share your
> > experience in this regard? I have had a look in archive but nothing
> relates
> > to my probelm.
> >
> > Thanks,
> > Hakim
> >
> >
> >
>
>
>