Dear All:
Can PCI-E device use mother board’s DMA controller? I can’t get the parameter (DmaChannel) that the DMA descriptor needs from CmResourceTypeDma.
By the way, what is the DmaSpeed ? DDK says they can be Compatible, TypeA, TypeB, TypeC, or TypeF. What are these values mean?
Last question, what is the DemandMode and AutoInitialize ?
Not if you are talking about the legacy pc-at dma controller. But these
concepts do recycle, so 20 years from now somebody will be asking if
they can plug into the legacy IOAT controller with their 100x faster bus
device.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of
xxxxx@hotmail.com
Sent: Wednesday, June 11, 2008 6:12 AM
To: Windows System Software Devs Interest List
Subject: [ntdev] Can PCI-E device use mother board’s DMA controller?
Dear All:
Can PCI-E device use mother board’s DMA controller? I can’t get the
parameter (DmaChannel) that the DMA descriptor needs from
CmResourceTypeDma.
By the way, what is the DmaSpeed ? DDK says they can be Compatible,
TypeA, TypeB, TypeC, or TypeF. What are these values mean?
Last question, what is the DemandMode and AutoInitialize ?
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Dear Mark:
You mean there is no way to do this? I just do an experiment and I don’t care the pereformance. I mean I will use the the mohter-board DMA (in the south bridge) to
move the data between PC’s RAM and my PCI-E’s RAM. Is there any way to do this? Thanks!
Subject: RE: [ntdev] Can PCI-E device use mother board’s DMA controller?> Date: Wed, 11 Jun 2008 08:58:42 -0400> From: xxxxx@stratus.com> To: xxxxx@lists.osr.com> > Not if you are talking about the legacy pc-at dma controller. But these> concepts do recycle, so 20 years from now somebody will be asking if> they can plug into the legacy IOAT controller with their 100x faster bus> device.> > -----Original Message-----> From: xxxxx@lists.osr.com> [mailto:xxxxx@lists.osr.com] On Behalf Of> xxxxx@hotmail.com> Sent: Wednesday, June 11, 2008 6:12 AM> To: Windows System Software Devs Interest List> Subject: [ntdev] Can PCI-E device use mother board’s DMA controller?> > Dear All:> Can PCI-E device use mother board’s DMA controller? I can’t get the> parameter (DmaChannel) that the DMA descriptor needs from> CmResourceTypeDma. > By the way, what is the DmaSpeed ? DDK says they can be Compatible,> TypeA, TypeB, TypeC, or TypeF. What are these values mean? > Last question, what is the DemandMode and AutoInitialize ?> > > —> NTDEV is sponsored by OSR> > For our schedule of WDF, WDM, debugging and other seminars visit: > http://www.osr.com/seminars\> > To unsubscribe, visit the List Server section of OSR Online at> http://www.osronline.com/page.cfm?name=ListServer\> > —> NTDEV is sponsored by OSR> > For our schedule of WDF, WDM, debugging and other seminars visit: > http://www.osr.com/seminars\> > To unsubscribe, visit the List Server section of OSR Online at http://www.osronline.com/page.cfm?name=ListServer
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I mean there is no way to do this.
2008/6/11 Yang Felix :
> Dear Mark:
> You mean there is no way to do this? I just do an experiment and I
> don’t care the pereformance. I mean I will use the the mohter-board DMA (in
> the south bridge) to
> move the data between PC’s RAM and my PCI-E’s RAM. Is there any way to do
> this? Thanks!
>
> –
> Mark Roddy
>
Really?!?
I’m neither questioning the correctness of your answer nor the goofiness of the OP’s request… but I AM surprised to hear that it CAN’T be done.
Just for my own edification and enjoyment, can you explain what prohibits somebody (who both is sufficiently motivated and sufficiently deranged) from using the on-board DMA controller to slave DMA data to/from their PCI-E device?
The only thing *I* could think of would be the main-memory addressing… but that problem could be circumvented by locating a buffer at an appropriate physical memory location.
I’m just curious,
Peter
OSR
xxxxx@osr.com wrote:
Really?!?
I’m neither questioning the correctness of your answer nor the goofiness of the OP’s request… but I AM surprised to hear that it CAN’T be done.
Just for my own edification and enjoyment, can you explain what prohibits somebody (who both is sufficiently motivated and sufficiently deranged) from using the on-board DMA controller to slave DMA data to/from their PCI-E device?
The only thing *I* could think of would be the main-memory addressing… but that problem could be circumvented by locating a buffer at an appropriate physical memory location.
Mark simply left the asterisk off of his remark pointing to the disclaimers.
Theoretically, you are correct. However, the motherboard DMA chips are
essentially unchanged from their IBM AT design. So, you have the
following crippling limitations:
* Three of the channels can only do 8 bits at a time
* The other three can only do 16 bits at a time
* You can’t do more than 128k at a time
* There are only 24 address bits, so both physical addresses must be in
the low-order 16MB of address space
* They are *FAR* slower than “rep movsd”: 4 MB/sec theoretical max, but
in practice that is rarely achievable
Some PCI devices today can only handle 32-bit transfers. With such a
device, the motherboard DMA controller simply cannot be used. Even when
it CAN be used, doing so is stupid.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
xxxxx@hotmail.com wrote:
Can PCI-E device use mother board’s DMA controller? I can’t get the parameter (DmaChannel) that the DMA descriptor needs from CmResourceTypeDma.
Please forget about the motherboard DMA controller *right now*. If this
were 1986, you might consider it for your device. Today, it serves
absolutely no purpose. It is FASTER to use memcpy.
To get the best possible performance from your PCI-E device, your
hardware MUST support bus-master DMA. There is simply NO ALTERNATIVE.
You can’t fix it in software. End of story.
By the way, what is the DmaSpeed ?
4 megabytes per second. That’s the MAXIMUM speed of a motherboard DMA
controller.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
I think that Mark is right, at least for most chipsets.
Remember what the PC DMA controller does. It reads from an I/O port
in FIFO fashion and writes data to memory or it writes to the FIFO as
it reads from memory.
From all the talking I’ve done with various chipset designers, I
seriously doubt that an I/O port read or write initiated by the DMA
controller in the south bridge would be internally routed onto a PCIe
bus. Since the ISA bus is subtractive-decode, it would probably be
issued on the ISA bus (or LPC, or whatever you want to call it these
days) and it would then go unclaimed.
- Jake Oshins
wrote in message news:xxxxx@ntdev…
>
>
> Really?!?
>
> I’m neither questioning the correctness of your answer nor the
> goofiness of the OP’s request… but I AM surprised to hear that it
> CAN’T be done.
>
> Just for my own edification and enjoyment, can you explain what
> prohibits somebody (who both is sufficiently motivated and
> sufficiently deranged) from using the on-board DMA controller to
> slave DMA data to/from their PCI-E device?
>
> The only thing I could think of would be the main-memory
> addressing… but that problem could be circumvented by locating a
> buffer at an appropriate physical memory location.
>
> I’m just curious,
>
> Peter
> OSR
>
>
The problems of using the legacy AT DMA controller on PCI-e (or any non-ISA bus for that matter) go far and beyond.
The DMA interface does *not* transfer between main memory and an I/O port. It transfers between memory and a specific *DMA channel*. No I/O port address is ever programmed on the DMA chip. And no I/O port address is ever issued on any bus. That’s why ISA cards had jumpers to select the DMA channel, or had a fixed conventional DMA channel. If you could use an I/O port address (or a secondary memory address), then DMA channels wouldn’t be needed.
And the reason it worked like that, is because actually no FIFO at all is used on the DMA chip (that wouldn’t be too efficient Jake). The DMA chip just setups all the control signals and let the peripheral transfer the data directly. Then dedicated DMA channels *signals* were required.
So unless the chipset has some custom means to forward a specific DMA channel to a specific (I/O) address, then the onboard DMA can only be used on the ISA bus (LPC interface nowadays).
The DMA chip had a special memory-to-memory transfer mode. This mode conceivable could have been used. But it worked only on the XT/8-bit channels, and is not implemented in most chipsets.
> Can PCI-E device use mother board’s DMA controller?
If you don’t mind, could you please explain why do you think PCI device would ever *want* to use on-board DMA controller, instead of issuing cycles on the bus??? What is the reason for hardware manufacturer of not providing bus-mastering capability for his PCI device???
Anton Bassov
I got bored trying to look up how the address signals were routed and if
in fact it might be possible on some current chipsets to do something
incredibly stupid. I’ll stick with my original answer modified by Tim’s
‘*’.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Jake Oshins
Sent: Wednesday, June 11, 2008 12:43 PM
To: Windows System Software Devs Interest List
Subject: Re:[ntdev] Can PCI-E device use mother board’s DMA controller?
I think that Mark is right, at least for most chipsets.
Remember what the PC DMA controller does. It reads from an I/O port
in FIFO fashion and writes data to memory or it writes to the FIFO as
it reads from memory.
From all the talking I’ve done with various chipset designers, I
seriously doubt that an I/O port read or write initiated by the DMA
controller in the south bridge would be internally routed onto a PCIe
bus. Since the ISA bus is subtractive-decode, it would probably be
issued on the ISA bus (or LPC, or whatever you want to call it these
days) and it would then go unclaimed.
- Jake Oshins
wrote in message news:xxxxx@ntdev…
>
>
> Really?!?
>
> I’m neither questioning the correctness of your answer nor the
> goofiness of the OP’s request… but I AM surprised to hear that it
> CAN’T be done.
>
> Just for my own edification and enjoyment, can you explain what
> prohibits somebody (who both is sufficiently motivated and
> sufficiently deranged) from using the on-board DMA controller to
> slave DMA data to/from their PCI-E device?
>
> The only thing I could think of would be the main-memory
> addressing… but that problem could be circumvented by locating a
> buffer at an appropriate physical memory location.
>
> I’m just curious,
>
> Peter
> OSR
>
>
—
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For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars
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THAT’s easy… COST. That’s the answer I get all the time for why people don’t implement busmaster DMA (or, even worse, implement bus master DMA but not scatter/gather support… ARRRGH!)
Now, that’s not the same answer as “why would anybody want to use the slave DMA controller from a PCI-E device” – That’s just plain silly. Though the OP *did* say this was just some sort of experiment.
Peter
OSR
xxxxx@osr.com wrote:
THAT’s easy… COST. That’s the answer I get all the time for why people don’t implement busmaster DMA (or, even worse, implement bus master DMA but not scatter/gather support… ARRRGH!)
But no one these days is going to implement a PCI-Express core from
scratch. The protocol is just too complicated, and there’s no return on
the engineering investment. It’s a solid man-year of work. Everyone
buys an existing, known-good core, and ALL of the available cores
support bus-mastering. It’s required.
Scatter/gather does require additional work on the part of the hardware
designer, but even so I’m shocked at how many designs lack it.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
I can speak with fair amount of certainty that the analysis here is correct.
In fact many legacy DMA controllers will only work with an SIO-based floppy
device and won’t work with anything else because the logic to do anything
beyond that has been removed because with the removal of ISA, there is no
need for legacy DMA.
On 6/11/08 1:10 PM, “Roddy, Mark” wrote:
> I got bored trying to look up how the address signals were routed and if
> in fact it might be possible on some current chipsets to do something
> incredibly stupid. I’ll stick with my original answer modified by Tim’s
> ‘*’.
>
> -----Original Message-----
> From: xxxxx@lists.osr.com
> [mailto:xxxxx@lists.osr.com] On Behalf Of Jake Oshins
> Sent: Wednesday, June 11, 2008 12:43 PM
> To: Windows System Software Devs Interest List
> Subject: Re:[ntdev] Can PCI-E device use mother board’s DMA controller?
>
> I think that Mark is right, at least for most chipsets.
>
> Remember what the PC DMA controller does. It reads from an I/O port
> in FIFO fashion and writes data to memory or it writes to the FIFO as
> it reads from memory.
>
> From all the talking I’ve done with various chipset designers, I
> seriously doubt that an I/O port read or write initiated by the DMA
> controller in the south bridge would be internally routed onto a PCIe
> bus. Since the ISA bus is subtractive-decode, it would probably be
> issued on the ISA bus (or LPC, or whatever you want to call it these
> days) and it would then go unclaimed.
>
> - Jake Oshins
>
>
>
> wrote in message news:xxxxx@ntdev…
>>
>>
>> Really?!?
>>
>> I’m neither questioning the correctness of your answer nor the
>> goofiness of the OP’s request… but I AM surprised to hear that it
>> CAN’T be done.
>>
>> Just for my own edification and enjoyment, can you explain what
>> prohibits somebody (who both is sufficiently motivated and
>> sufficiently deranged) from using the on-board DMA controller to
>> slave DMA data to/from their PCI-E device?
>>
>> The only thing I could think of would be the main-memory
>> addressing… but that problem could be circumvented by locating a
>> buffer at an appropriate physical memory location.
>>
>> I’m just curious,
>>
>> Peter
>> OSR
>>
>>
>
>
>
> —
> NTDEV is sponsored by OSR
>
> For our schedule of WDF, WDM, debugging and other seminars visit:
> http://www.osr.com/seminars
>
> To unsubscribe, visit the List Server section of OSR Online at
> http://www.osronline.com/page.cfm?name=ListServer
>
> —
> NTDEV is sponsored by OSR
>
> For our schedule of WDF, WDM, debugging and other seminars visit:
> http://www.osr.com/seminars
>
> To unsubscribe, visit the List Server section of OSR Online at
> http://www.osronline.com/page.cfm?name=ListServer
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Ijor is right on the money in every way. Look at the pinouts–there are no DMA signals on PCI stuff. The system DMA controller can’t get there because the wires don’t go there. Case closed.
You still save when not implementing bus-master DMA. Even you get the feature in the core for free, you still need extra logic and development on your side. I agree it doesn’t nearly make much sense as it was with conventional PCI though. One possible reason is that some companies are porting conventional PCI “target-only” designs, to PCIe.
Now, once you have hardware without bus-master DMA support (disregarding how much sense that makes), the idea of using legacy DMA (you can’t, but if you could) is not that stupid. Is is true that any modern CPU would make the transfer as fast, or even faster. But using the CPU, precisely, means more CPU usage. If you want to transfer 64 KB and your design is slow (it doesn’t matter how fast PCIe is, your logic behind might be slow), the saving in processor time would be quite significant. It is even worse in streaming designs when the transfer to/from the card is almost constant.
Tim Roberts wrote:
But no one these days is going to implement a PCI-Express core from
scratch. The protocol is just too complicated, and there’s no return on
the engineering investment. It’s a solid man-year of work. Everyone
buys an existing, known-good core, and ALL of the available cores
support bus-mastering. It’s required.
xxxxx@rahul.net wrote:
Now, once you have hardware without bus-master DMA support (disregarding how much sense that makes), the idea of using legacy DMA (you can’t, but if you could) is not that stupid. Is is true that any modern CPU would make the transfer as fast, or even faster. But using the CPU, precisely, means more CPU usage. If you want to transfer 64 KB and your design is slow (it doesn’t matter how fast PCIe is, your logic behind might be slow), the saving in processor time would be quite significant. It is even worse in streaming designs when the transfer to/from the card is almost constant.
It’s really hard to overstate how sucky the legacy DMA controller is.
Think about the numbers. It runs 30 times slower than a PCI bus. It
runs 40 time slower than a 1-lane PCIe bus. It runs almost 1,000 times
slower than the CPU.
You could write your your slow device’s driver like this:
while( dataLeft-- )
{
WRITE_REGISTER_ULONG( myAddress, *pData++ );
KeDelayExecutionThread( … );
}
and STILL end up with a transfer that went faster than the legacy DMA
controller, with only a slight increase in CPU load.
The design of the EPP/ECP parallel port anticipated the use of DMA, and
it’s designers were so immensely pleased with it that the patented it.
When Microsoft wrote the parallel port driver for Windows NT, they did a
few studies that proved that using DMA decreased the overall parallel
port performance in every case. As a result, the NT parallel port
driver doesn’t even LOOK for a DMA resource.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.