ASM call for parallel prefeching of cache lines.

NTDEV
1

Hi,
Does anyone know the x86 (PIII,PIV) or IA64 _asm call for pre-fetching
cache lines of memory in a parallel manner (i.e. - the processor won’t wait
on the fetch)?
Thnx,
Gedon Rosner

You are currently subscribed to ntdev as: $subst(‘Recip.EmailAddr’)
To unsubscribe send a blank email to leave-ntdev-$subst(‘Recip.MemberIDChar’)@lists.osr.com

2

I don’t remember the actual instruction, but someone I know just ran an test of a
sequential algorithm on a P4 that was missing, and the code without the prefetch
ran faster than the code with the prefetch. On a P3 the preftech code was substantially
better. The hypothesis is that the P4 auto-prefetch in hardware is pretty good.

-DH
----- Original Message -----
From: “Rosner, Gedon”
To: “NT Developers Interest List”
Sent: Wednesday, January 23, 2002 11:55 AM
Subject: [ntdev] ASM call for parallel prefeching of cache lines.

> Hi,
> Does anyone know the x86 (PIII,PIV) or IA64 _asm call for pre-fetching
> cache lines of memory in a parallel manner (i.e. - the processor won’t wait
> on the fetch)?
> Thnx,
> Gedon Rosner
>
>
> —
> You are currently subscribed to ntdev as: xxxxx@syssoftsol.com
> To unsubscribe send a blank email to leave-ntdev-$subst(‘Recip.MemberIDChar’)@lists.osr.com

—
You are currently subscribed to ntdev as: $subst(‘Recip.EmailAddr’)
To unsubscribe send a blank email to leave-ntdev-$subst(‘Recip.MemberIDChar’)@lists.osr.com