Message signaled interrupt with IoConnectInterruptEx

Well, that’s the next step.

Hello, dear friends

From that, I got both HPET and ioAPIC worked well individually.
But I failed in getting them talked to each other. The ISR could not be called.

First, the HPET side:
I use timer0 and set it to work in Periodic Mode.
The General Configuration Register is set as 0x01. ( Allow to run and interrupt, diable legacyreplacement route).
I can read the value of Configuration and Capabilities Register. It is 0x00f000000000ad3c,
which means
Interrupt Type: edge triggered
Interrupt Enable: Yes
Timer Type: periodic interrupt
Periodic Interrupt Capable: YES
Timer Size: 64bit
32-bit Mode: YES
Interrupt Route: 22pin
FSB Interrupt Enable: NO
FSB Interrupt Delivery: available.

I can see the Comparator Value Register steps up by the value last written.
::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::
Then, the ioAPIC side:
Because I used 22nd pin in my asl file,

   Device (TMR1)
    {
        Name (_HID, "HPET0016")
        Name (_CID, "ACPI\SofTimer")
        Name (_UID, 0x1)
        Method (_STA)
        {
            Return(0xf)
        }
        Method (_CRS, 0x0, NotSerialized) {
            Name (RBUF, ResourceTemplate () {
                Interrupt(ResourceConsumer, Edge, ActiveHigh, Exclusive) { 0x16 }
            })
            Return(RBUF)
        }
    }

I noticed that the 22nd I/O Redirection Table entry register is changed to 0xf000000000009a0 by OS.
which means
Interrupt Vector: a0
Delivery Mode:001(Lowest priority)
Destination Mode: Logical Mode
Delivery Status: IDLE
Interrupt Input Pin Polarity: High active
Trigger Mode: Edge sensitive
Interrupt Mask: Not masked
These parameters can also be confirmed in EVT_WDF_DEVICE_PREPARE_HARDWARE by PCM_PARTIAL_RESOURCE_DESCRIPTOR.

I also noticed that the Delivery Status bit of I/O Redirection Table entry register stayed IDLE.
And the ISR is not called.

I can see IRQ22 has been allocated to my device from device manager.

Is the 22nd pin of HPET not connected(mapped) to the IRQ22 of ioAPIC? or is there something I have not set?

I have searched for the cause for three days and found no way out.
Help me!

On May 27, 2019, at 5:34 PM, tatuo wrote:
>
> From that, I got both HPET and ioAPIC worked well individually.
> But I failed in getting them talked to each other. The ISR could not be called.

Are you absolutely sure that HPET timer 1 is not already in use by the operating system?

> Interrupt Route: 22pin
> FSB Interrupt Enable: NO
> FSB Interrupt Delivery: available.

What does “22pin” mean? Does that mean pin 22 of the HPET chip? Do you actually know what IRQ that’s tied to? And don’t you need the interrupt to be enable?

> Because I used 22nd pin in my asl file,
>
> Device (TMR1) { Name (_HID, “HPET0016”) Name (_CID, “ACPI\SofTimer”) Name (_UID, 0x1) Method (_STA) { Return(0xf) } Method (_CRS, 0x0, NotSerialized) { Name (RBUF, ResourceTemplate () { Interrupt(ResourceConsumer, Edge, ActiveHigh, Exclusive) { 0x16 } }) Return(RBUF) } }

OK, but how did you pick IRQ 0x16?

> Is the 22nd pin of HPET not connected(mapped) to the IRQ22 of ioAPIC? or is there something I have not set?

Well, right, you have to know this. You can’t assume that a pin number has anything to do with IRQ number. Do you have schematics for the board?

Tim Roberts, timr@probo.com
Providenza & Boekelheide, Inc.

Dear Mr. Roberts

Thank you for your help.

Are you absolutely sure that HPET timer 1 is not already in use by the operating system?

Yes, I have confirmed it before I use it.

What does “22pin” mean?

That means connecting to IRQ22.

Do you actually know what IRQ that’s tied to?

It is written in the specification of HPET.

And don’t you need the interrupt to be enable?

I enable it in the Configuration and Capabilities Register. (The third bit is it.)

OK, but how did you pick IRQ 0x16?

I found it is available to use but is not used yet. It can be confirmed by the Configuration and Capabilities Register.

You can’t assume that a pin number has anything to do with IRQ number. Do you have schematics for the board?

I have not the schematics. But I read the specification of HEPT and ioAPIC. And I read the registers of HEPT and ioAPIC.

yours sincerely.

Tatuo