> I am trying to use the portio sample by assigning the port base address(0x0400)
…
I get returned value for offset 0,1,2,3 but anything >3 number gives me error "IOCTL failed
error code 998 " which means “ERROR_NOACCESS - Invalid access to memory
location” Can anyone let me know why I am getting this error?
Tim, do you still have any objections to “sarcasm generators”? Look - the OP arbitrarily assigs IO space range to PCI (!!!) device and wonders why it does not work. Don’t you find it funny???
Anton Bassov
Your logconfig data below specifies 4 bytes of ports, if you need more
change the 303 value of the first IOConfig line to be the 300+N-1 where
N is the number of bytes your registers use. And the second line should
replace the 4 with N.
Don Burn (MVP, Windows DKD)
Windows Filesystem and Driver Consulting
Website: http://www.windrvr.com
Blog: http://msmvps.com/blogs/WinDrvr
-----Original Message-----
From: xxxxx@gmail.com [mailto:xxxxx@gmail.com]
Posted At: Tuesday, April 20, 2010 8:18 PM
Posted To: ntdev
Conversation: Driver to access the IO mapped hardware
Subject: RE: Driver to access the IO mapped hardware
Sharovar,
I can not use these routines in my GUI as they use previledged IN and
OUT
calls.
I am trying to use the portio sample by assigning the port base
address(0x0400) and installed with the available genport.inf.I am
using sample
application gpdread.exe to read the port by sending the offset.I am
basically
trying to read the registers.
I get returned value for offset 0,1,2,3 but anything >3 number gives
me error
"IOCTL failed error code 998 " which means “ERROR_NOACCESS - Invalid
access to
memory location”
Can anyone let me know why I am getting this error?
In genport .inf I see the following
[PortIO.LC0]
ConfigPriority=DESIRED
IOConfig=300-303(3ff:
; 10 bit decode ranging from 300 - 303
[PortIO.LC1]
ConfigPriority=NORMAL
IOConfig=4@300-3ff(3ff: ; 4 ports starting anywhere between 300 and
3fc
Is this the reason for the error I am seeing?
Thanks,
vkbr
__________ Information from ESET Smart Security, version of virus
signature
database 5045 (20100420) __________
The message was checked by ESET Smart Security.
http://www.eset.com
Don,
Your logconfig data below specifies 4 bytes of ports, if you need more change the 303
value of the first IOConfig line to be the 300+N-1 where N is the number of bytes your registers use.
And the second line should replace the 4 with N.
Don’t forget that he speaks about PCI device here…
Anton Bassov
Hi ,
Please excuse me if my question sounds funny.
I am trying to allocate the hardware resources through inf file for my non PNP device and hoping to get these resources by PNP preparehardware callback.
My hardware IO port base address and enabled at PCI configuration base address (0xD17F0) with offset range (D0-E7h).
I also know the hardware IO space base address as 0x0400 with offset range (00-0F).
I modified the genport .inf file to include these IO and memory ranges but when I look at the Driver resources it says that these ranges conflict with PCI bus.
I modified the following sections in genport.inf to indicate IO and Memory range
[PortIO_Inst.NT]
CopyFiles=PortIO.CopyFiles
LogConfig=PortIO.LC0, MemIO.LC0
[PortIO.CopyFiles]
genport.sys
[PortIO_Inst.NT.Services]
AddService=PORTIO,0x00000002,PortIO_Service
;Uncomment following lines if your device can only work with factory default settings
;[PortIO.NT.FactDef]
;ConfigPriority=HARDRECONFIG
;IOConfig=300-303(3ff: ; 10 bit decode ranging from 300 - 303
[PortIO.LC0]
ConfigPriority=DESIRED
IOConfig=400-40f(fff: ; 12 bit decode ranging from 400 - 40f
[MemIO.LC0]
ConfigPriority=DESIRED
Memconfig=D17F0-D18F0
Can you tell me should be done to avoid conflict with PCI bus?
> Can you tell me should be done to avoid conflict with PCI bus?
To give it up…
What you are trying to do is simply ridiculous.Period. You just don’t deal with PCI devices this way…
BTW, if you need some assistance with your controller’s specifics you can look at Linux sources, namely, …/drivers/i2c/busses/ i2c-viapro.c…
Anton Bassov
>I can not use these routines in my GUI as they use previledged IN and OUT calls.
What does it mean?Does an application call IO/OUT?
I look at the Driver resources it says that these ranges conflict with PCI bus.
Because your hardware is PCI device you need to develop PnP driver. But I don’t know how it would work without Vendor/Device ID. Attach WinDbg and run !pci command. You could see if your hardware is recognized.
Igor Sharovar
The op’s device is on the system management bus and it is not clear at all
that this means it is a ‘pci device’, despite the OP stating that he think’s
it is a pci device. His thoughts are based on the observation that the
config space for some pci (bridge/chipset) device provides access to his SMB
device. SMB device access is not well documented, to say the least.
Frequently one has to have some yellow cover book from intel (or the
equivalent from some other chipset vendor) with all sorts of red stamping on
it warning you just how f*d you are if you disclose anything in it to
anyone. Or one could go to linux, the only decent suggestion so far, to see
how they might be doing whatever it is the OP is trying to do and then
contemplating how to do that on windows, where the answer might in fact be
“the SMB device’s IO memory is mapped into the PCI/ISA bridge IO space and
can be accessed like any ISA device.”
Mark Roddy
On Wed, Apr 21, 2010 at 11:44 AM, wrote:
> >I can not use these routines in my GUI as they use previledged IN and OUT
> calls.
> What does it mean?Does an application call IO/OUT?
> >I look at the Driver resources it says that these ranges conflict with PCI
> bus.
> Because your hardware is PCI device you need to develop PnP driver. But I
> don’t know how it would work without Vendor/Device ID. Attach WinDbg and run
> !pci command. You could see if your hardware is recognized.
>
> Igor Sharovar
>
> —
> NTDEV is sponsored by OSR
>
> For our schedule of WDF, WDM, debugging and other seminars visit:
> http://www.osr.com/seminars
>
> To unsubscribe, visit the List Server section of OSR Online at
> http://www.osronline.com/page.cfm?name=ListServer
>
xxxxx@gmail.com wrote:
Please excuse me if my question sounds funny.
I am trying to allocate the hardware resources through inf file for my non PNP device and hoping to get these resources by PNP preparehardware callback.
My hardware IO port base address and enabled at PCI configuration base address (0xD17F0) with offset range (D0-E7h).
I also know the hardware IO space base address as 0x0400 with offset range (00-0F).
If we can ignore Anton for a moment and focus on your troubles, you do
have a rather high degree of confusion here. In particular, you seem to
be freely mixing the concepts of I/O space, memory space, and config space.
Unless this is an ISA device, 0xD17F0 is not a memory address that would
be assigned by any rational PCI arbiter, nor is it a valid I/O port
number (I/O port address are limited to 16 bits). Where did you get
that number? And what does D0-E7 have to do with anything? Where did
that come from?
0x0400 is also somewhat unusual, because it overlaps I/O port 0 on
devices which do 10-bit decode. Is that a hard-coded value? How do you
know that?
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
> The op’s device is on the system management bus and it is not clear at all that this means
it is a ‘pci device’, despite the OP stating that he think’s it is a pci device.
Actually, assuming that his information about targeting ViA VX855 chipset is correct, a brief look at Linux sources reveals that it is, indeed, a PCI device that gets accessed by Linux in a way all PCI devices are accessed (i.e. its driver calls pci_register_driver()and registers a callback that gets invoked by PCI subsystem when the device of interest is detected so that a driver gets all info about device resources from PCI subsystem) …
Although, judging from the same sources, SMBus areas can, indeed, be forcefully assigned to some particular fixed addresses (it can be done by passing a module parameter on the command line), you are warned quite a few times how dangerous this approach is compared to obtaining all info from PCI configuration space…
Anton Bassov
Hi Tim,
Client inofrmed me that SMBus Controller is in IO space belong to south bridge and address is 0x0400.
He also sent a document with list of registers from which I got the address 0xD17F0.See below
----------------------------------------------------few lines from the document---------------------------
System Management Bus-Specific Configuration Registers(D0-E7)
Offset Address:D1-D0h(D17F0)
SMBus I/O Base
( register contents here)
Offset Address:D2h(D17F0)
SMBus Host Configuration
( register contents here)
…
and so on till E7h
System Management IO space
System Management Bus I/O space registers(SMIO 00-0Fh)
The base address for these registers is defined in RxD1-D0 of the D17F0 PCI configuration registers.The system management BUs I/O space is enabled for access if D17F0 RxD2[0]=1;"
…
Thanks,
vbkr
> System Management Bus-Specific Configuration Registers(D0-E7)
Offset Address:D1-D0h(D17F0)
Incredible!!! D17F0 is obviously a device/function pair (bus number is obviously zero). However, the OP somehow turned it into the address 0xd17f0. Tim, do you still mind my “sarcasm generator”???
Anton Bassov
> If we can ignore Anton for a moment and focus on your troubles,
The only thing I can say to it is “May his “production” run on your laptop then”…
Please note that he is dealing with the thermal stuff here. Therefore, he has a very good chance to damage
quite a few laptops beyond any repair if his “masterpiece” goes in production - after all, he made it clear that he does it upon the customer’s request…
Anton Bassov
xxxxx@gmail.com wrote:
Hi Tim,
Client inofrmed me that SMBus Controller is in IO space belong to south bridge and address is 0x0400.
He also sent a document with list of registers from which I got the address 0xD17F0.
That’s written as D17:F0, right? That means PCI device 0x17 function 0
on bus 0. The registers you describe here are offsets within the PCI
configuration space of that device.
You’ll have to use a function like HalGetBusData to read that
configuration space. You could use IRP_MN_READ_CONFIG or
IRP_MN_QUERY_INTERFACE with BUS_INTERFACE_STANDARD if you are a filter
driver for this device, but I suspect you are not.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
Mark Roddy wrote:
… Frequently one has to have some yellow cover book from
intel (or the equivalent from some other chipset vendor) with all sorts
of red stamping on it warning you just how f*d you are if you disclose
anything in it to anyone.
The gentlest of admonitions; they start to get serious with the orange
books, and by the red ones all your worries about being under
surveillance may not be paranoia …
Hi Tim,
Thanks for your patience and help.
Since I pretty new to windows drivers and PCI bus ,so I interpreted it wrongly.
I would appreciate good links to study.
The SM bus controller is in the IO space of D17:F0.
What would you suggest me to do in regards to access the SM bus Host controller registers?
Please let me know any sample driver or links so that I can read and start to implement the driver?
Thanks,
vbkr
xxxxx@gmail.com wrote:
Since I pretty new to windows drivers and PCI bus ,so I interpreted it wrongly.
I would appreciate good links to study.
The SM bus controller is in the IO space of D17:F0.
It’s in the configuration space for D17:F0, right? That’s quite
different. SMBus is a tricky place to be for someone who is new to drivers.
What would you suggest me to do in regards to access the SM bus Host controller registers?
Please let me know any sample driver or links so that I can read and start to implement the driver?
What do you need to DO with these registers? What kinds of operations
are you performing? I’ve never had to play with the SMbus, but the
people who have posted here in the past have never gone away happy. To
access the config space safely, you need to be in the driver stack for
the device, and because the device is a bridge, it doesn’t usually have
a driver.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
Hi ,
I need to read and write to the registers of a slave device on the SM bus host controller.The slave device is temperature and Fan controller chip.
I have good knowledge on how to configure the slave device from host contoller.
All my troubles are on how to access SM host contollers IO space and registers from user space through driver(driver sample ??).
I tried to use sample portio driver in wdk to access the IO space but no success.
Any suggestions are welcome on the driver implementation.
I would like to thank all for responding to my questions.
Thanks
vbkr
> All my troubles are on how to access SM host contollers IO space and registers from user
space through driver(driver sample ??).
Once you know device/function pair (bus is obviously zero) you can use HalGetBusData() and friends
to access configuration space (which is not how you normally deal with PCI devices but your case is very special). At this point you will be able to get to the base address of device registers in memory or IO space, and program your device. Again, look at the Linux sources for more info about dealing with your device’s specifics…
I tried to use sample portio driver in wdk to access the IO space but no success.
How many times I told you that you just don’t deal with PCI devices this way???
Anton Bassov
The problem is that the SMBUS registers are typically already owned by another driver in the system.
Arbitrarily partying on register resources you don’t own is, ah, “somewhat discouraged.”
Peter
OSR
>The problem is that the SMBUS registers are typically already owned by another driver in the system.
And it is very likely OP system already has such driver because he mention about existing application that access to SMBUS. And access could be done only through a driver. Writing another driver would be not good idea.
Igor Sharovar