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Comments
I am not aware of any currently.
Over the past year, I have heard of several very specific use-cases for bus reset/rescan... but my understanding that to date MSFT has always said “no”.
Peter
Peter Viscarola
OSR
@OSRDrivers
I went through some scenarios not exactly like yours but a bit more general. And experienced similar issues. What Peter said is correct, perhaps with an addition that some hardware vendor might improve this situation tiny bit.
Example of scenario
1. development boards powers up
2. a PCIE connected FPGA power up simultaneously and it gets its default parameters, say a bogus DSP class PCIe device
3. UEFI runs and enumerates FPGA as say 3:0:1 DSP class PCIe device
4. Windows 10 boots. Same PCIe enumeration as in UEFI
5. Now we connect to FPGA and configure it as multimedia class device. That is we reconfigure its PCIe registers, and FPGA now becomes a new, valid, good multimedia device.
6. what would be nice that we could re-enumerate this newly configured FPGA now as multimedia device, i.e. to tell Windows 10 to completely forget that the same PCIe peripheral was DSP device, as if it never was plugged in into PCIe. So far it does not happen that way on our reference board.
Reached out to hardware vendor and had discussion with them. Was told vaguely "not to changes horses in the middle of the river" that because Windows 10 cannot do that for PCIe devices, it is best to do all such change of FPGA configuration before Windows 10 boots. Or better yet finalize FPGA and make ASIC instead which will be always in one right PCIe configuration from the start.
Put this thing behind a PCIe switch or bridge. Disable & enable it to cause reenumeration?
Frankly, after doing similar projects on the other OS , I'd never try it on Windows again.
So easy, no nasty surprises, everything can be accessed from usermode. It's heaven and earth.
And only then... Windows.
-- pa
Thank you Pavel for sharing your thought.
Speaking of placing FPGA behind a switch - it was considered a while ago but our hw designers were not happy on that.
In addiiton, I was advocating a new and different approach of using Intel Xeon+FPGA combo silicon where it was promiced such issue would have been solved by design. Intel did not deliver.
Using another OS to develop and Windows 10 for production is possible but incurrs significant overhead for engineering given our situation.
regards,
Sergey