with an nt kernel mode driver, and a pci board with
onboard memory, i am trying to write to addresses and
read them back. i get the correct addresses mapped
using haltranslatebusaddress, and then i map them
properly using
MmMapIoSpace(physicalAddressBase, length, FALSE), and
then i free the mapping using mmunmapiospace.
my test program runs a loop of 10 or 100 times,
writing to an address, and then reading from that
address, and what happens is that in the first loop,
the memory is written and then read correctly, but the
next time, the read is performed before the write
finishes.
for example
memory 0 has in it a ffffffff
memory 1 has in it a ffffffff
memory 2 has in it a ffffffff
i run the program writing the loop number that its up
to inside of the memory location.
after the first loop memory 0 has a 0, and it reads a
0, after the second loop, memory 1 has a 1, and it
reads ffffffff. if i then run the program again
without resetting the memory, it gets up to loop 3,
and memory 3 then gets a 3, but it reads ffffffff.
it seems to me that it is reading before the write is
done, is it possible this has to do with page faults,
and the page only being reloaded into virtual memory
when the read wants it, and only after the read, the
write happens?? and if so, how do i solve this?
thanx
Nachum
and thanx for the help with the large integers,
although i haven’t had a chance to test that yet.
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> the memory is written and then read correctly, but the
> next time, the read is performed before the write
> finishes.
Dear Nachum,
It sounds like you are the victim of a superscalar processor architecture.
To solve this problem, NT provides the WRITE_REGISTER_xxx and
READ_REGISTER_xxx macros to access memory; these instructions ensure that
the write cache is properly flushed.
[For a lucid discussion on the topic of mapped HW memory and superscalar
architectures, including a discussion of the problems which ensue, the way
the aformentioned macros solve them, and alternative solutions, see Dekker
and Newcomer, pages 284-288]
is it possible this has to do with page faults,
> and the page only being reloaded into virtual memory
> when the read wants it, and only after the read
There is no issue with page faults here, since you are dealing with mapped
HW memory. The memory is permanently mapped to a set of physical addresses,
and the memory is always present on your hardware device. The processor
cannot and will not page out the memory; it will always rely on it being
right there on your hardware device.
Sincerely,
Avi Shmidman
Jerusalem, Israel
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How exactly are you reading and writing your device memory?
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Nachum Kanovsky
Sent: Sunday, July 01, 2001 5:39 AM
To: NT Developers Interest List
Subject: [ntdev] writing and reading to mapped board memory
with an nt kernel mode driver, and a pci board with
onboard memory, i am trying to write to addresses and
read them back. i get the correct addresses mapped
using haltranslatebusaddress, and then i map them
properly using
MmMapIoSpace(physicalAddressBase, length, FALSE), and
then i free the mapping using mmunmapiospace.
my test program runs a loop of 10 or 100 times,
writing to an address, and then reading from that
address, and what happens is that in the first loop,
the memory is written and then read correctly, but the
next time, the read is performed before the write
finishes.
for example
memory 0 has in it a ffffffff
memory 1 has in it a ffffffff
memory 2 has in it a ffffffff
i run the program writing the loop number that its up
to inside of the memory location.
after the first loop memory 0 has a 0, and it reads a
0, after the second loop, memory 1 has a 1, and it
reads ffffffff. if i then run the program again
without resetting the memory, it gets up to loop 3,
and memory 3 then gets a 3, but it reads ffffffff.
it seems to me that it is reading before the write is
done, is it possible this has to do with page faults,
and the page only being reloaded into virtual memory
when the read wants it, and only after the read, the
write happens?? and if so, how do i solve this?
thanx
Nachum
and thanx for the help with the large integers,
although i haven’t had a chance to test that yet.
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Right - this sure sounds like the infamous pentium write post buffer
getting in the way of people who bypass the HAL to do device IO.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com] On Behalf Of Avi Shmidman
Sent: Sunday, July 01, 2001 12:25 PM
To: NT Developers Interest List
Subject: [ntdev] Re: writing and reading to mapped board memory
> the memory is written and then read correctly, but the
> next time, the read is performed before the write
> finishes.
Dear Nachum,
It sounds like you are the victim of a superscalar processor
architecture. To solve this problem, NT provides the
WRITE_REGISTER_xxx and
READ_REGISTER_xxx macros to access memory; these instructions
ensure that
the write cache is properly flushed.
[For a lucid discussion on the topic of mapped HW memory and
superscalar
architectures, including a discussion of the problems which
ensue, the way
the aformentioned macros solve them, and alternative
solutions, see Dekker
and Newcomer, pages 284-288]
> is it possible this has to do with page faults,
> and the page only being reloaded into virtual memory
> when the read wants it, and only after the read
There is no issue with page faults here, since you are
dealing with mapped
HW memory. The memory is permanently mapped to a set of
physical addresses,
and the memory is always present on your hardware device. The
processor
cannot and will not page out the memory; it will always rely
on it being
right there on your hardware device.
Sincerely,
Avi Shmidman
Jerusalem, Israel
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