Stack usage during an IPI

Hello,

When a processor sends an IPI to the target processor, which stack is used by the target processor?

I am noticing a case where

  1. I have a thread T1 running on CPU 0 at DISPATCH_LEVEL
  2. The CPU 0 ends up sending an IPI to CPU 1
  3. The CPU 1 ends up writing to thread T1’s kernel stack.

The instruction that writes to thread T1 belongs to HalpX86InterruptIpiService. It is saving lot of state on to thread T1’s kernel stack.

Is this expected? Any insight will be greatly appreciated!

Thanks.
-Prasad

Why do you need an IPI? How do you send it? Show the code.

Well, I am not sending an IPI.

While my thread is running on CPU 0 at DISPATCH_LEVEL, the system ends up sending an IPI to CPU 1 and the code running on CPU 1 (HalpX86InterruptIpiService) is saving lot of state on the kernel stack of my thread (push and mov instructions).

So, I wanted to understand if this is expected behaviour.

Hope that clarifies my question.

Thanks.
-Prasad

Are you trying to use a CPU-targeted DPC?

At any time, your code can be interrupted by an IPI which is requested on
any CPU. IPIs are requested on a particular CPU but not sent to particular
CPUs, they always execute on all CPUs.

//Daniel

Actually, you can send IPI to any particular CPU, including itself, as well as broadcast it to all CPUs on the machine - it depends on what you write to your local APIC’s ICR. This is described by Intel/AMD manuals, and, hence, is OS-agnostic. OTOH,I don’t exclude the possibility that Windows
HAL functions, indeed, chose to limit themselves to functionality subset that you have described…

Anton Bassov

Hello,

I am not directly using any CPU-targeted DPC.

My question is around stack usage while processing an IPI interrupt. I mentioned the observed behaviour and wanted to confirm if it’s expected behaviour. My thread (CPU 0) is making a Windows call ExFreePool that is triggering a TLB flush which results in sending an IPI to CPU 1 and the IPI interrupt routine running on CPU 1 ends pushing using my thread’s stack to save state.

Thanks.
-Prasad

Is it causing you any problems?

>Actually, you can send IPI to any particular CPU, including itself, as well

as broadcast it to all CPUs on the machine - it depends on what you write
to your local APIC’s ICR.

You are right Anton, it’s just the Windows behavior I described. At the CPU
level and probably in Linux too you can configure the destination for IPIs.

//Daniel