> If an application thread (user mode) invokes SetThreadAffinityMask, and
subsequently makes calls to DeviceIOControl on a driver (kernel mode)
which has no specified thread affinity, is the thread guaranteed to
maintain its processor assignment?
A driver has no thread affinity because in general this is a meaningless
concept for a driver. The top-level dispatch routine will be executed in
the context of the calling thread, and as such is constrained by whatever
that thread’s affinity is set to. The ISR executes on whatever core the
interrupt is directed to, and this can vary with the basic architecture,
the support chip choice and/or the motherboard manufacturer. In any case
it is not under your control. The DPC executes, typically, on the same
core that the interrupt was processed on. You can direct the DPC to
another core, but then you must ask “which one”, which means you have to
know the thread affinity of the thread that issued the IRP.
This is all sounding like a need to find a solution to a nonexistent problem.
The application I have in mind is processing (in parallel) data from
multiple identical, simultaneously-sampling devices. Each device is
handled by a separate thread. Ideally, the user interface thread would be
assigned to yet another processor.
I used this technique for one client: if they didn’t run their video
threads at priority 15, they lost data. But if they ran the background
threads at 15, the GUI was essentially dead. So I asked them if three
cores could handle the data acquisition. They thought yes, so we built a
version of their app where we bound the GUI to affinity mask 0x00000001
and the secondary threads to (processor_mask & ~0x00000001). Worked like
a charm. Key here is letting the scheduler handle all the other cores.
Why do you need a separate thread to handle each device? This sounds
really strange. A better solution is to use async I/O wwith an I/O
Completion Port and a thread pool to handle the completions. For a device
like this, using synchronous I/O results in needless overheads and
complexity.
Here’s the problem I found in trying to answer this question. Most (maybe
all?) of the literature on parallel processing concentrates on the
processing, and ignores I/O. I suspect that I/O behaves differently,
since it involves physical connections to the processor(s).
Look at database literature. It is almost always I/O bottlenecked, so
they want a lot of high-bandwidth concurrent I/O but parallel processing
in the classic sense rarely helps performance. You were searching for the
wrong topic. And yes, to take advantage of concurrent I/O you need to
know the device-to-memory-bus mappings (Intel, for example, supports
multiple busses to memory, while AMD supports NUMA, a topic far too large
to go into here)
But be aware: if you optimize your work on one particular architecture, it
may be pessimized for another. Even if you say “But we’re selling turnkey
systems”, two years from now when you order your next 100 machines, the
vendor may have changed them, and the board architecture you so carefully
optimized for is simply no longer available.
I tried a simple-minded experiment to see if there would be any
improvement in the maximum data throughput using thread affinities, as
opposed to just letting the OS schedule everything. In the experiment
(Intel Core2 Quad CPU, WinXT, 2 acquisition devices/threads, 1 GUI thread)
the devices are USB digitizers (our company product and driver) acquiring
bursty data (~30 Mbits/s, in bursts of ~1ms on, ~1ms off). But the task
manager is telling me that my thread affinity assignments are being
ignored, so the experimental result is meaningless.
It tells you this how? I’ve got demo code that shows that affinities are
obeyed. Well, at least they were on XP. Which OS are you using? Or did
you say “WinXT” when you meant to type “WinXP”?
Thanks in advance for any constructive advice. I’m just getting started on
this project and don’t want to waste too much time on a wild goose chase.
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