Mats Petersson would like to recall the message, “[ntdev] How to delay
execution”.
> To try to fix this problem, we worked with Intel to produce a
new clock spec
for PCs that would be much higher-frequency than the PM Timer
and much
closer to the processor, without being on-chip. It has gone
by several
names, including “Multimedia Timer,” “High Performance Event
Timer,” etc.
And very recent implementations of KeQPC use it.
You obviously worked with AMD too on this account (or Intel published specs
that AMD read? ;-), because the Athlon 64 and Opteron chipsets have a
“Multimedia timer” in it.
–
Mats
Uhhh … Mats … you replied to so many in that thread, which one should I
“erase erase erase”.
–
Gary G. Little
Seagate Technologies, LLC
wrote in message news:xxxxx@ntdev…
> Mats Petersson would like to recall the message, “[ntdev] How to delay
> execution”.
>
Ehm, the one the only contains a copy of Jake’s mail. At least, that’s the
one I intended to stop…
Outlook has this nice featuer which comes in very handy when you happen to
do “send” on an e-mail you didn’t want to send (like pressing Ctrl-S instead
of Ctrl-X because of “big finger” syndrom). Unfortunately, if the e-mail is
no longer in the server, it just sends a mail to say “ wanted to
recall the mail with subject XXXX”. Stupid thing…
–
Mats
> -----Original Message-----
> From: Gary G. Little [mailto:xxxxx@sbcglobal.net]
> Sent: Wednesday, February 11, 2004 2:18 PM
> To: Windows System Software Devs Interest List
> Subject: Re:[ntdev] Recall: How to delay execution
>
>
> Uhhh … Mats … you replied to so many in that thread,
> which one should I
> “erase erase erase”.
>
> –
> Gary G. Little
> Seagate Technologies, LLC
>
> wrote in message news:xxxxx@ntdev…
> > Mats Petersson would like to recall the message, “[ntdev]
> How to delay
> > execution”.
> >
>
>
>
> —
> Questions? First check the Kernel Driver FAQ at
> http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@3dlabs.com
> To unsubscribe send a blank email to xxxxx@lists.osr.com
>
And you are a real-time expert, so where is the at most part :-).
BTW, I’m sure Jake wanted to say “non decreasing” not “increasing” :-).
I need virtual memory to absorb all these, but fantastic stuff :-).
-prokash
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of
xxxxx@3Dlabs.com
Sent: Wednesday, February 11, 2004 6:25 AM
To: Windows System Software Devs Interest List
Subject: RE: [ntdev] Recall: How to delay execution
Ehm, the one the only contains a copy of Jake’s mail. At least, that’s the
one I intended to stop…
Outlook has this nice featuer which comes in very handy when you happen to
do “send” on an e-mail you didn’t want to send (like pressing Ctrl-S instead
of Ctrl-X because of “big finger” syndrom). Unfortunately, if the e-mail is
no longer in the server, it just sends a mail to say “ wanted to
recall the mail with subject XXXX”. Stupid thing…
–
Mats
> -----Original Message-----
> From: Gary G. Little [mailto:xxxxx@sbcglobal.net]
> Sent: Wednesday, February 11, 2004 2:18 PM
> To: Windows System Software Devs Interest List
> Subject: Re:[ntdev] Recall: How to delay execution
>
>
> Uhhh … Mats … you replied to so many in that thread,
> which one should I
> “erase erase erase”.
>
> –
> Gary G. Little
> Seagate Technologies, LLC
>
> wrote in message news:xxxxx@ntdev…
> > Mats Petersson would like to recall the message, “[ntdev]
> How to delay
> > execution”.
> >
>
>
>
> —
> Questions? First check the Kernel Driver FAQ at
> http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@3dlabs.com
> To unsubscribe send a blank email to xxxxx@lists.osr.com
>
—
Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256
You are currently subscribed to ntdev as: xxxxx@garlic.com
To unsubscribe send a blank email to xxxxx@lists.osr.com
The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
TSC:
“Following reset, the counter is incremented every processor clock cycle,
even when the processor is halted by the HLT instruction or the external
STPCLK# pin.”
Are you privy of undocumented information that we don’t have access to ?
And placing a RDTSC instruction at the very head of an ISR is a pretty
decent way of getting interrupt timing, unless of course we use a scope or a
logic analyzer.
Alberto.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Jake Oshins
Sent: Wednesday, February 11, 2004 1:11 AM
To: Windows System Software Devs Interest List
Subject: Re:[ntdev] How to delay execution
The problem comes when you try to compare that number to something. If you
think you know the current frequency of the TSC, you’re in error. If you
think that you can compare the number of cycles that a code segment took to
execute to the time that another segment took to execute, then maybe you get
something useful, but not on a HyperThreaded machine.
TSC doesn’t beat every cycle, by the way. It beats once every frontside bus
clock, which is far from every cycle.
–
Jake Oshins
Windows Base Kernel Team
This posting is provided “AS IS” with no warranties, and confers no rights.
“Moreira, Alberto” wrote in message
news:xxxxx@ntdev…
>
> But the TSC beats every cycle, why is it that you cannot get good
> resolution
> ? Does Windows kill it somehow ? If I put a RDTSC inside an interrupt
> handler and I frig the IDT to put it right on top of the interrupt chain,
> why would I not get accurate timing ?
>
> Alberto.
>
>
> -----Original Message-----
> From: xxxxx@lists.osr.com
> [mailto:xxxxx@lists.osr.com]On Behalf Of Gary G. Little
> Sent: Tuesday, February 10, 2004 10:26 AM
> To: Windows System Software Devs Interest List
> Subject: Re:[ntdev] How to delay execution
>
>
> One of the misnomers of the industry is that to many managers and
> inexperienced driver developers think Windows (NT4+) can be used for
> real-time processing, and then when they have problems with it, they start
> blindly shot- solutions to overcome the failings of their design in
> Windows.
> The sad part is that many of them come here to ask why and will never
> believe the “you can’t do that” answer, so they then wonder off into a
> corner sucking their thumbs and mumbling things about evil empires and bad
> Billy.
>
> Windows is NOT a real time operating system, and typically speaking, you
> will never get reliable timings less than 1 quantum (typically 10 ms).
> The idea presented here, I believe by Mats, for a dedicated and separate
> timer interrupt, is about the best I have seen, but even then I would be
> willing to bet that depending upon the desired frequency, that there will
> at
> times be large intervals.
>
> –
> Gary G. Little
> Seagate Technologies, LLC
>
> wrote in message news:xxxxx@ntdev…
>> The problem is based on the fact that if you give up your use of the CPU,
>> the next task may run for a undetermined time quanta, and the interupt
>> frequency of Windows isn’t high enough to give a reasonably quick “next
>> timeslice”.
>>
>> Now, the question is of course “why do you need this?”
>>
>> It’s quite clear that most hardware in Windows doesn’t require precise
>> timing, or a lot more things would go wrong very quickly.
>>
>> –
>> Mats
>>
>> > -----Original Message-----
>> > From: Nikolay [mailto:xxxxx@pisem.net]
>> > Sent: Tuesday, February 10, 2004 2:46 PM
>> > To: Windows System Software Devs Interest List
>> > Subject: Re:[ntdev] How to delay execution
>> >
>> >
>> > There are a plenty of ways how to make own timer 
>> > But how to force thread to delay execution, and specify the
>> > precision time,
>> > and do not stall the processor?
>> > I think that there is no happy medium on Windows 
>> > If you do not stall the processor and use KeDelayExecution -
>> > you lose the
>> > precision …and vice versa
>> >
>> > I’ve chosen KeStallExecutionProcessor
>> >
>> > Thanks,
>> > Nikolay
>> >
>> >
>> > “Moreira, Alberto” wrote in message
>> > news:xxxxx@ntdev…
>> > >
>> > > Have you tried to issue an RDTSC instruction directly ?
>> > It’s available in
>> > > every machine since the P6, and it ticks every clock cycle.
>> > But of course,
>> > > if Windows writes to MSR 10h, you’re out of luck. However,
>> > the P4 has 16
>> > > sets of counters you can reach through the RDPMC
>> > instruction, hopefully
>> > you
>> > > might find one that’s not touched by the OS ? I suggest you
>> > take a good
>> > look
>> > > at Section 14 of Volume 3 of the P4 Architecture Manual (go to
>> > > http://developer.intel.com and you can download it),
>> > there’s a lot of good
>> > > stuff on performance measurement in there.
>> > >
>> > > Another alternative, of course, is to use a scope or a
>> > logic analyzer.
>> > Hope
>> > > this helps,
>> > >
>> > >
>> > > Alberto.
>> > >
>> > >
>> > >
>> > > -----Original Message-----
>> > > From: xxxxx@lists.osr.com
>> > > [mailto:xxxxx@lists.osr.com]On Behalf Of (SV2AGW)George
>> > > Rossopoulos
>> > > Sent: Monday, February 09, 2004 5:32 PM
>> > > To: Windows System Software Devs Interest List
>> > > Subject: RE: [ntdev] How to delay execution
>> > >
>> > >
>> > > >
>> > > >> I have a driver that must measures accurately the time
>> > elapsed between
>> > > >>interrupts that the hardware generates.
>> > > >> QueryPerformanceCounters is not what I was expected
>> > perhaps because
>> > > >> windows modify the counter depending on the system hardware.
>> > >
>> > >
>> > > >What were you expecting? Why was it not suitable?
>> > >
>> > > The returning value was not updated regulary. I mean that
>> > if you call it
>> > > twice you get most of the time the same result.
>> > > Although in general shows the time elapsed you cannot get
>> > accurate short
>> > > ranges.
>> > > The code is working well for more than 7 years now.
>> > > I must say here that the driver is for a special device and
>> > is used in
>> > > systems where the user knows how to handle this.
>> > >
>> > > Of course you cannot put it in a device sold off the self, but it is
>> > rather
>> > > rare to need such performance from such devices.
>> > > On the other hand you can put it in dedicated systems safely.
>> > >
>> > > regards
>> > >
>> > >
>> > > (SV2AGW)George Rossopoulos
>> > > xxxxx@elcom.gr
>> > > www.elcom.gr/sv2agw
>> > > +306932465216
>> > > George Rossopoulos
>> > > Nikanoros 59
>> > > 54250,Thessaloniki
>> > > Greece
>> > >
>> > > -----Original Message-----
>> > > From: xxxxx@lists.osr.com
>> > > [mailto:xxxxx@lists.osr.com] On Behalf Of J.
>> > J. Farrell
>> > > Sent: Monday, February 09, 2004 9:55 PM
>> > > To: Windows System Software Devs Interest List
>> > > Subject: Re:[ntdev] How to delay execution
>> > >
>> > >
>> > > “(SV2AGW)George Rossopoulos” wrote in message
>> > > news:xxxxx@ntdev…
>> > > >
>> > > > I have a driver that must measures accurately the time
>> > elapsed between
>> > > > interrupts that the hardware generates.
>> > > > QueryPerformanceCounters is not what I was expected
>> > perhaps because
>> > > > windows modify the counter depending on the system hardware.
>> > >
>> > >
>> > >
>> > > —
>> > > Questions? First check the Kernel Driver FAQ at
>> > > http://www.osronline.com/article.cfm?id=256
>> > >
>> > > You are currently subscribed to ntdev as: xxxxx@softhome.net To
>> > unsubscribe
>> > > send a blank email to xxxxx@lists.osr.com
>> > >
>> > >
>> > > —
>> > > Questions? First check the Kernel Driver FAQ at
>> > > http://www.osronline.com/article.cfm?id=256
>> > >
>> > > You are currently subscribed to ntdev as:
>> > xxxxx@compuware.com
>> > > To unsubscribe send a blank email to
>> > xxxxx@lists.osr.com
>> > >
>> > >
>> > >
>> > > The contents of this e-mail are intended for the named
>> > addressee only. It
>> > > contains information that may be confidential. Unless you
>> > are the named
>> > > addressee or an authorized designee, you may not copy or use it, or
>> > disclose
>> > > it to anyone else. If you received it in error please notify us
>> > immediately
>> > > and then destroy it.
>> > >
>> > >
>> >
>> >
>> >
>> > —
>> > Questions? First check the Kernel Driver FAQ at
>> http://www.osronline.com/article.cfm?id=256
>>
>> You are currently subscribed to ntdev as: xxxxx@3dlabs.com
>> To unsubscribe send a blank email to xxxxx@lists.osr.com
>>
>
>
>
> —
> Questions? First check the Kernel Driver FAQ at
> http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@compuware.com
> To unsubscribe send a blank email to xxxxx@lists.osr.com
>
>
>
> The contents of this e-mail are intended for the named addressee only. It
> contains information that may be confidential. Unless you are the named
> addressee or an authorized designee, you may not copy or use it, or
> disclose
> it to anyone else. If you received it in error please notify us
> immediately
> and then destroy it.
>
>
—
Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256
You are currently subscribed to ntdev as: xxxxx@compuware.com
To unsubscribe send a blank email to xxxxx@lists.osr.com
The contents of this e-mail are intended for the named addressee only. It
contains information that may be confidential. Unless you are the named
addressee or an authorized designee, you may not copy or use it, or disclose
it to anyone else. If you received it in error please notify us immediately
and then destroy it.
“Moreira, Alberto” wrote in message
news:xxxxx@ntdev…
>
> The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> TSC:
>
> “Following reset, the counter is incremented every processor clock cycle,
> even when the processor is halted by the HLT instruction or the external
> STPCLK# pin.”
I believe that all implementations to date have counted the processor
clock. If I remember correctly, the architectural definition is along
the lines that it counts fairly quickly, and it is not possible for
two reads to return the same value (apart from wrap-around).
But it does muck with the bus clock. The bus clock stops while the voltage
regulator is changed from one voltage to another. This time is
indeterminate.
–
Jake Oshins
Windows Base Kernel Team
This posting is provided “AS IS” with no warranties, and confers no rights.
“Loren Wilton” wrote in message news:xxxxx@ntdev…
>> portable with an AMD Athlon XP-M, would run at a frequency between 500MHz
>> and, say, 1500MHz. If you don’t know which it is at the moment (and it
>> may
>> change at any time), you can’t use it to measure time precisely.
>>
>> Same applies to the Opteron/Athlon64 with “cool’n’quiet” technoloty, they
>> will change frequency depending on the load in the system.
>>
>> Intel’s SpeedStep does similar things, but as far as I understand, the
>> controls are slightly different. I think it’s controlled by the chipset,
> but
>> I’m not sure exactly how it works.
>
> I’m not familiar with the various laptop speed staging technologies, but I
> can see at least three things they could be doing:
>
> 1. Varying the bus clock
> 2. Varying the cpu clock multiplier
> 3. Idling the cpu for various periods of time while leaving the bus clock
> alone
>
> The TSC is based on the bus clock, not the CPU clock. So if the speed
> management technology doesn’t muck up the bus clock, the TSC will remain a
> valid constant counter of time. If the speed control does muck with the
> bus
> clock, and there isn’t logic to compensate for that in the TSC interface,
> then of course the TSC becomes unreliable as a measurement of absolute
> time
> duration.
>
> Loren
>
>
Yes, I did work with AMD. I talk to their chipset guys all the time.
–
Jake Oshins
Windows Base Kernel Team
This posting is provided “AS IS” with no warranties, and confers no rights.
wrote in message news:xxxxx@ntdev…
>> To try to fix this problem, we worked with Intel to produce a
>> new clock spec
>> for PCs that would be much higher-frequency than the PM Timer
>> and much
>> closer to the processor, without being on-chip. It has gone
>> by several
>> names, including “Multimedia Timer,” “High Performance Event
>> Timer,” etc.
>> And very recent implementations of KeQPC use it.
>>
> You obviously worked with AMD too on this account (or Intel published
> specs
> that AMD read? ;-), because the Athlon 64 and Opteron chipsets have a
> “Multimedia timer” in it.
>
> –
> Mats
>
I certainly do have the books that you can’t get. I generally have
information on processors that is never published, and for what is
published, I often have it several years beforehand.
With that said, I’ll never intentionally talk about any of that material
here. And I don’t think that I’ve violated Intel’s confidences here. I
think that the manual is merely wrong or misleading. In this case, I think
that “processor clock cycle” refers to the input reference clock, not the
clock after it’s been through the internal multipliers inside the core.
- Jake
–
Jake Oshins
Windows Base Kernel Team
This posting is provided “AS IS” with no warranties, and confers no rights.
“Moreira, Alberto” wrote in message
news:xxxxx@ntdev…
>
> The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> TSC:
>
> “Following reset, the counter is incremented every processor clock cycle,
> even when the processor is halted by the HLT instruction or the external
> STPCLK# pin.”
>
> Are you privy of undocumented information that we don’t have access to ?
>
> And placing a RDTSC instruction at the very head of an ISR is a pretty
> decent way of getting interrupt timing, unless of course we use a scope or
> a
> logic analyzer.
>
>
> Alberto.
>
>
> -----Original Message-----
> From: xxxxx@lists.osr.com
> [mailto:xxxxx@lists.osr.com]On Behalf Of Jake Oshins
> Sent: Wednesday, February 11, 2004 1:11 AM
> To: Windows System Software Devs Interest List
> Subject: Re:[ntdev] How to delay execution
>
>
> The problem comes when you try to compare that number to something. If
> you
> think you know the current frequency of the TSC, you’re in error. If you
> think that you can compare the number of cycles that a code segment took
> to
> execute to the time that another segment took to execute, then maybe you
> get
>
> something useful, but not on a HyperThreaded machine.
>
> TSC doesn’t beat every cycle, by the way. It beats once every frontside
> bus
>
> clock, which is far from every cycle.
>
> –
> Jake Oshins
> Windows Base Kernel Team
> This posting is provided “AS IS” with no warranties, and confers no
> rights.
>
> “Moreira, Alberto” wrote in message
> news:xxxxx@ntdev…
>>
>> But the TSC beats every cycle, why is it that you cannot get good
>> resolution
>> ? Does Windows kill it somehow ? If I put a RDTSC inside an interrupt
>> handler and I frig the IDT to put it right on top of the interrupt chain,
>> why would I not get accurate timing ?
>>
>> Alberto.
>>
>>
>> -----Original Message-----
>> From: xxxxx@lists.osr.com
>> [mailto:xxxxx@lists.osr.com]On Behalf Of Gary G. Little
>> Sent: Tuesday, February 10, 2004 10:26 AM
>> To: Windows System Software Devs Interest List
>> Subject: Re:[ntdev] How to delay execution
>>
>>
>> One of the misnomers of the industry is that to many managers and
>> inexperienced driver developers think Windows (NT4+) can be used for
>> real-time processing, and then when they have problems with it, they
>> start
>> blindly shot- solutions to overcome the failings of their design in
>> Windows.
>> The sad part is that many of them come here to ask why and will never
>> believe the “you can’t do that” answer, so they then wonder off into a
>> corner sucking their thumbs and mumbling things about evil empires and
>> bad
>> Billy.
>>
>> Windows is NOT a real time operating system, and typically speaking, you
>> will never get reliable timings less than 1 quantum (typically 10 ms).
>> The idea presented here, I believe by Mats, for a dedicated and separate
>> timer interrupt, is about the best I have seen, but even then I would be
>> willing to bet that depending upon the desired frequency, that there will
>> at
>> times be large intervals.
>>
>> –
>> Gary G. Little
>> Seagate Technologies, LLC
>>
>> wrote in message news:xxxxx@ntdev…
>>> The problem is based on the fact that if you give up your use of the
>>> CPU,
>>> the next task may run for a undetermined time quanta, and the interupt
>>> frequency of Windows isn’t high enough to give a reasonably quick “next
>>> timeslice”.
>>>
>>> Now, the question is of course “why do you need this?”
>>>
>>> It’s quite clear that most hardware in Windows doesn’t require precise
>>> timing, or a lot more things would go wrong very quickly.
>>>
>>> –
>>> Mats
>>>
>>> > -----Original Message-----
>>> > From: Nikolay [mailto:xxxxx@pisem.net]
>>> > Sent: Tuesday, February 10, 2004 2:46 PM
>>> > To: Windows System Software Devs Interest List
>>> > Subject: Re:[ntdev] How to delay execution
>>> >
>>> >
>>> > There are a plenty of ways how to make own timer
>>> > But how to force thread to delay execution, and specify the
>>> > precision time,
>>> > and do not stall the processor?
>>> > I think that there is no happy medium on Windows
>>> > If you do not stall the processor and use KeDelayExecution -
>>> > you lose the
>>> > precision …and vice versa
>>> >
>>> > I’ve chosen KeStallExecutionProcessor
>>> >
>>> > Thanks,
>>> > Nikolay
>>> >
>>> >
>>> > “Moreira, Alberto” wrote in message
>>> > news:xxxxx@ntdev…
>>> > >
>>> > > Have you tried to issue an RDTSC instruction directly ?
>>> > It’s available in
>>> > > every machine since the P6, and it ticks every clock cycle.
>>> > But of course,
>>> > > if Windows writes to MSR 10h, you’re out of luck. However,
>>> > the P4 has 16
>>> > > sets of counters you can reach through the RDPMC
>>> > instruction, hopefully
>>> > you
>>> > > might find one that’s not touched by the OS ? I suggest you
>>> > take a good
>>> > look
>>> > > at Section 14 of Volume 3 of the P4 Architecture Manual (go to
>>> > > http://developer.intel.com and you can download it),
>>> > there’s a lot of good
>>> > > stuff on performance measurement in there.
>>> > >
>>> > > Another alternative, of course, is to use a scope or a
>>> > logic analyzer.
>>> > Hope
>>> > > this helps,
>>> > >
>>> > >
>>> > > Alberto.
>>> > >
>>> > >
>>> > >
>>> > > -----Original Message-----
>>> > > From: xxxxx@lists.osr.com
>>> > > [mailto:xxxxx@lists.osr.com]On Behalf Of (SV2AGW)George
>>> > > Rossopoulos
>>> > > Sent: Monday, February 09, 2004 5:32 PM
>>> > > To: Windows System Software Devs Interest List
>>> > > Subject: RE: [ntdev] How to delay execution
>>> > >
>>> > >
>>> > > >
>>> > > >> I have a driver that must measures accurately the time
>>> > elapsed between
>>> > > >>interrupts that the hardware generates.
>>> > > >> QueryPerformanceCounters is not what I was expected
>>> > perhaps because
>>> > > >> windows modify the counter depending on the system hardware.
>>> > >
>>> > >
>>> > > >What were you expecting? Why was it not suitable?
>>> > >
>>> > > The returning value was not updated regulary. I mean that
>>> > if you call it
>>> > > twice you get most of the time the same result.
>>> > > Although in general shows the time elapsed you cannot get
>>> > accurate short
>>> > > ranges.
>>> > > The code is working well for more than 7 years now.
>>> > > I must say here that the driver is for a special device and
>>> > is used in
>>> > > systems where the user knows how to handle this.
>>> > >
>>> > > Of course you cannot put it in a device sold off the self, but it is
>>> > rather
>>> > > rare to need such performance from such devices.
>>> > > On the other hand you can put it in dedicated systems safely.
>>> > >
>>> > > regards
>>> > >
>>> > >
>>> > > (SV2AGW)George Rossopoulos
>>> > > xxxxx@elcom.gr
>>> > > www.elcom.gr/sv2agw
>>> > > +306932465216
>>> > > George Rossopoulos
>>> > > Nikanoros 59
>>> > > 54250,Thessaloniki
>>> > > Greece
>>> > >
>>> > > -----Original Message-----
>>> > > From: xxxxx@lists.osr.com
>>> > > [mailto:xxxxx@lists.osr.com] On Behalf Of J.
>>> > J. Farrell
>>> > > Sent: Monday, February 09, 2004 9:55 PM
>>> > > To: Windows System Software Devs Interest List
>>> > > Subject: Re:[ntdev] How to delay execution
>>> > >
>>> > >
>>> > > “(SV2AGW)George Rossopoulos” wrote in message
>>> > > news:xxxxx@ntdev…
>>> > > >
>>> > > > I have a driver that must measures accurately the time
>>> > elapsed between
>>> > > > interrupts that the hardware generates.
>>> > > > QueryPerformanceCounters is not what I was expected
>>> > perhaps because
>>> > > > windows modify the counter depending on the system hardware.
>>> > >
>>> > >
>>> > >
>>> > > —
>>> > > Questions? First check the Kernel Driver FAQ at
>>> > > http://www.osronline.com/article.cfm?id=256
>>> > >
>>> > > You are currently subscribed to ntdev as: xxxxx@softhome.net To
>>> > unsubscribe
>>> > > send a blank email to xxxxx@lists.osr.com
>>> > >
>>> > >
>>> > > —
>>> > > Questions? First check the Kernel Driver FAQ at
>>> > > http://www.osronline.com/article.cfm?id=256
>>> > >
>>> > > You are currently subscribed to ntdev as:
>>> > xxxxx@compuware.com
>>> > > To unsubscribe send a blank email to
>>> > xxxxx@lists.osr.com
>>> > >
>>> > >
>>> > >
>>> > > The contents of this e-mail are intended for the named
>>> > addressee only. It
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You’re actually misunderstanding a chipset bug workaround. The code
actually read the counter twice to guarantee that the results were within a
certain bound, since the underlying timer hardware was busted, often
returning complete garbage. It doesn’t surprise me that you hit this with
an Athlon. Athlons often get paired with the buggiest chipsets.
–
Jake Oshins
Windows Base Kernel Team
This posting is provided “AS IS” with no warranties, and confers no rights.
“Loren Wilton” wrote in message news:xxxxx@ntdev…
> Ah. Things have changed since I last read the code, which is hardly
> surprising. I’m almost positive that a couple-three years ago the code
> did
> indeed attempt to guarantee a different value on every call, and if the PM
> timer returned the same value on two calls it was assumed to be busted,
> and
> QPC incremented the time value by 1<<24.
>
> And in fact I had one Athelon machine with a fast enough clock that I
> could
> write code that would call QPC often enough to hit this, and I could watch
> my computed time of day value going by at about 300 times the normal rate
> at
> which seconds pass. I had to write a bunch of hack code in the app that
> if
> two sequential calls returned a time difference > 3 seconds apart I would
> rebase my timing values to account for the drift. (calls would never be
> more than about 5ms apart, so this was safe).
>
> Loren
>
>
> ----- Original Message -----
> From: “Jake Oshins”
> Newsgroups: ntdev
> To: “Windows System Software Devs Interest List”
> Sent: Tuesday, February 10, 2004 10:05 PM
> Subject: Re:[ntdev] How to delay execution
>
>
>> I disagree on several counts. (And I’m the guy who wrote some of the
>> current implementations of KeQPC.)
>>
>> KeQPC is not guaranteed to return a different value on every call. If it
>> were, you couldn’t guarantee that the frequency was correct.
>> Back-to-back
>> calls would imply that more time was passing than actually was passing.
>>
>> KeQPC does guarantee monotonically increasing values. Two calls within a
>> sufficiently small period of time may return the same value.
>
>
Easy enough to find out, isn’t it? RDTSC isn’t a privileged instruction.
Write a little 5-line program to read the value, wait 10 seconds, read it
again, divide by 10 and print the answer. The decide if 200e6 or whatever
is printed is the processor clock speed or the bus clock speed. You don’t
even need any particular amount of precision in that 10 second wait.
Sleep() will work just fine.
Loren
----- Original Message -----
From: “J. J. Farrell”
Newsgroups: ntdev
To: “Windows System Software Devs Interest List”
Sent: Wednesday, February 11, 2004 3:47 PM
Subject: Re:[ntdev] How to delay execution
>
> “Moreira, Alberto” wrote in message
> news:xxxxx@ntdev…
> >
> > The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> > TSC:
> >
> > “Following reset, the counter is incremented every processor clock
cycle,
> > even when the processor is halted by the HLT instruction or the external
> > STPCLK# pin.”
>
> I believe that all implementations to date have counted the processor
> clock. If I remember correctly, the architectural definition is along
> the lines that it counts fairly quickly, and it is not possible for
> two reads to return the same value (apart from wrap-around).
>
>
> —
> Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@earthlink.net
> To unsubscribe send a blank email to xxxxx@lists.osr.com
>
> But it does muck with the bus clock. The bus clock stops while the
voltage
regulator is changed from one voltage to another. This time is
indeterminate.
Which does make it kinda hard to use the TSC as a source of reliable
real-world time, and possibly even accumulating processor (or rather,
‘system possibly operational’) time (assuming the value becomes
indeterminate while the power is being changed.)
Loren
Now, you forgot one step. Get every processor from Pentium on, including
differing steps and speeds and check that they all do this correctly. I’m
not sure but I think I remember seeing a change when a system I was testing
went from a P90 to a P166, but that was a number of years ago.
–
Don Burn (MVP, Windows DDK)
Windows 2k/XP/2k3 Filesystem and Driver Consulting
“Loren Wilton” wrote in message news:xxxxx@ntdev…
> Easy enough to find out, isn’t it? RDTSC isn’t a privileged instruction.
> Write a little 5-line program to read the value, wait 10 seconds, read it
> again, divide by 10 and print the answer. The decide if 200e6 or whatever
> is printed is the processor clock speed or the bus clock speed. You don’t
> even need any particular amount of precision in that 10 second wait.
> Sleep() will work just fine.
>
> Loren
>
I’m going to dig it out, we also have our direct line to Intel, although
recently I haven’t perused anything that’s not 64 bit. This would be a
serious mis-statement of the chip’s functionality, worth of an errata item !
Alberto.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Jake Oshins
Sent: Wednesday, February 11, 2004 7:40 PM
To: Windows System Software Devs Interest List
Subject: Re:[ntdev] How to delay execution
I certainly do have the books that you can’t get. I generally have
information on processors that is never published, and for what is
published, I often have it several years beforehand.
With that said, I’ll never intentionally talk about any of that material
here. And I don’t think that I’ve violated Intel’s confidences here. I
think that the manual is merely wrong or misleading. In this case, I think
that “processor clock cycle” refers to the input reference clock, not the
clock after it’s been through the internal multipliers inside the core.
- Jake
–
Jake Oshins
Windows Base Kernel Team
This posting is provided “AS IS” with no warranties, and confers no rights.
“Moreira, Alberto” wrote in message
news:xxxxx@ntdev…
>
> The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> TSC:
>
> “Following reset, the counter is incremented every processor clock cycle,
> even when the processor is halted by the HLT instruction or the external
> STPCLK# pin.”
>
> Are you privy of undocumented information that we don’t have access to ?
>
> And placing a RDTSC instruction at the very head of an ISR is a pretty
> decent way of getting interrupt timing, unless of course we use a scope or
> a
> logic analyzer.
>
>
> Alberto.
>
>
> -----Original Message-----
> From: xxxxx@lists.osr.com
> [mailto:xxxxx@lists.osr.com]On Behalf Of Jake Oshins
> Sent: Wednesday, February 11, 2004 1:11 AM
> To: Windows System Software Devs Interest List
> Subject: Re:[ntdev] How to delay execution
>
>
> The problem comes when you try to compare that number to something. If
> you
> think you know the current frequency of the TSC, you’re in error. If you
> think that you can compare the number of cycles that a code segment took
> to
> execute to the time that another segment took to execute, then maybe you
> get
>
> something useful, but not on a HyperThreaded machine.
>
> TSC doesn’t beat every cycle, by the way. It beats once every frontside
> bus
>
> clock, which is far from every cycle.
>
> –
> Jake Oshins
> Windows Base Kernel Team
> This posting is provided “AS IS” with no warranties, and confers no
> rights.
>
> “Moreira, Alberto” wrote in message
> news:xxxxx@ntdev…
>>
>> But the TSC beats every cycle, why is it that you cannot get good
>> resolution
>> ? Does Windows kill it somehow ? If I put a RDTSC inside an interrupt
>> handler and I frig the IDT to put it right on top of the interrupt chain,
>> why would I not get accurate timing ?
>>
>> Alberto.
>>
>>
>> -----Original Message-----
>> From: xxxxx@lists.osr.com
>> [mailto:xxxxx@lists.osr.com]On Behalf Of Gary G. Little
>> Sent: Tuesday, February 10, 2004 10:26 AM
>> To: Windows System Software Devs Interest List
>> Subject: Re:[ntdev] How to delay execution
>>
>>
>> One of the misnomers of the industry is that to many managers and
>> inexperienced driver developers think Windows (NT4+) can be used for
>> real-time processing, and then when they have problems with it, they
>> start
>> blindly shot- solutions to overcome the failings of their design in
>> Windows.
>> The sad part is that many of them come here to ask why and will never
>> believe the “you can’t do that” answer, so they then wonder off into a
>> corner sucking their thumbs and mumbling things about evil empires and
>> bad
>> Billy.
>>
>> Windows is NOT a real time operating system, and typically speaking, you
>> will never get reliable timings less than 1 quantum (typically 10 ms).
>> The idea presented here, I believe by Mats, for a dedicated and separate
>> timer interrupt, is about the best I have seen, but even then I would be
>> willing to bet that depending upon the desired frequency, that there will
>> at
>> times be large intervals.
>>
>> –
>> Gary G. Little
>> Seagate Technologies, LLC
>>
>> wrote in message news:xxxxx@ntdev…
>>> The problem is based on the fact that if you give up your use of the
>>> CPU,
>>> the next task may run for a undetermined time quanta, and the interupt
>>> frequency of Windows isn’t high enough to give a reasonably quick “next
>>> timeslice”.
>>>
>>> Now, the question is of course “why do you need this?”
>>>
>>> It’s quite clear that most hardware in Windows doesn’t require precise
>>> timing, or a lot more things would go wrong very quickly.
>>>
>>> –
>>> Mats
>>>
>>> > -----Original Message-----
>>> > From: Nikolay [mailto:xxxxx@pisem.net]
>>> > Sent: Tuesday, February 10, 2004 2:46 PM
>>> > To: Windows System Software Devs Interest List
>>> > Subject: Re:[ntdev] How to delay execution
>>> >
>>> >
>>> > There are a plenty of ways how to make own timer
>>> > But how to force thread to delay execution, and specify the
>>> > precision time,
>>> > and do not stall the processor?
>>> > I think that there is no happy medium on Windows
>>> > If you do not stall the processor and use KeDelayExecution -
>>> > you lose the
>>> > precision …and vice versa
>>> >
>>> > I’ve chosen KeStallExecutionProcessor
>>> >
>>> > Thanks,
>>> > Nikolay
>>> >
>>> >
>>> > “Moreira, Alberto” wrote in message
>>> > news:xxxxx@ntdev…
>>> > >
>>> > > Have you tried to issue an RDTSC instruction directly ?
>>> > It’s available in
>>> > > every machine since the P6, and it ticks every clock cycle.
>>> > But of course,
>>> > > if Windows writes to MSR 10h, you’re out of luck. However,
>>> > the P4 has 16
>>> > > sets of counters you can reach through the RDPMC
>>> > instruction, hopefully
>>> > you
>>> > > might find one that’s not touched by the OS ? I suggest you
>>> > take a good
>>> > look
>>> > > at Section 14 of Volume 3 of the P4 Architecture Manual (go to
>>> > > http://developer.intel.com and you can download it),
>>> > there’s a lot of good
>>> > > stuff on performance measurement in there.
>>> > >
>>> > > Another alternative, of course, is to use a scope or a
>>> > logic analyzer.
>>> > Hope
>>> > > this helps,
>>> > >
>>> > >
>>> > > Alberto.
>>> > >
>>> > >
>>> > >
>>> > > -----Original Message-----
>>> > > From: xxxxx@lists.osr.com
>>> > > [mailto:xxxxx@lists.osr.com]On Behalf Of (SV2AGW)George
>>> > > Rossopoulos
>>> > > Sent: Monday, February 09, 2004 5:32 PM
>>> > > To: Windows System Software Devs Interest List
>>> > > Subject: RE: [ntdev] How to delay execution
>>> > >
>>> > >
>>> > > >
>>> > > >> I have a driver that must measures accurately the time
>>> > elapsed between
>>> > > >>interrupts that the hardware generates.
>>> > > >> QueryPerformanceCounters is not what I was expected
>>> > perhaps because
>>> > > >> windows modify the counter depending on the system hardware.
>>> > >
>>> > >
>>> > > >What were you expecting? Why was it not suitable?
>>> > >
>>> > > The returning value was not updated regulary. I mean that
>>> > if you call it
>>> > > twice you get most of the time the same result.
>>> > > Although in general shows the time elapsed you cannot get
>>> > accurate short
>>> > > ranges.
>>> > > The code is working well for more than 7 years now.
>>> > > I must say here that the driver is for a special device and
>>> > is used in
>>> > > systems where the user knows how to handle this.
>>> > >
>>> > > Of course you cannot put it in a device sold off the self, but it is
>>> > rather
>>> > > rare to need such performance from such devices.
>>> > > On the other hand you can put it in dedicated systems safely.
>>> > >
>>> > > regards
>>> > >
>>> > >
>>> > > (SV2AGW)George Rossopoulos
>>> > > xxxxx@elcom.gr
>>> > > www.elcom.gr/sv2agw
>>> > > +306932465216
>>> > > George Rossopoulos
>>> > > Nikanoros 59
>>> > > 54250,Thessaloniki
>>> > > Greece
>>> > >
>>> > > -----Original Message-----
>>> > > From: xxxxx@lists.osr.com
>>> > > [mailto:xxxxx@lists.osr.com] On Behalf Of J.
>>> > J. Farrell
>>> > > Sent: Monday, February 09, 2004 9:55 PM
>>> > > To: Windows System Software Devs Interest List
>>> > > Subject: Re:[ntdev] How to delay execution
>>> > >
>>> > >
>>> > > “(SV2AGW)George Rossopoulos” wrote in message
>>> > > news:xxxxx@ntdev…
>>> > > >
>>> > > > I have a driver that must measures accurately the time
>>> > elapsed between
>>> > > > interrupts that the hardware generates.
>>> > > > QueryPerformanceCounters is not what I was expected
>>> > perhaps because
>>> > > > windows modify the counter depending on the system hardware.
>>> > >
>>> > >
>>> > >
>>> > > —
>>> > > Questions? First check the Kernel Driver FAQ at
>>> > > http://www.osronline.com/article.cfm?id=256
>>> > >
>>> > > You are currently subscribed to ntdev as: xxxxx@softhome.net To
>>> > unsubscribe
>>> > > send a blank email to xxxxx@lists.osr.com
>>> > >
>>> > >
>>> > > —
>>> > > Questions? First check the Kernel Driver FAQ at
>>> > > http://www.osronline.com/article.cfm?id=256
>>> > >
>>> > > You are currently subscribed to ntdev as:
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>>> > >
>>> > >
>>> > >
>>> > > The contents of this e-mail are intended for the named
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>>> > > contains information that may be confidential. Unless you
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>>> > >
>>> >
>>> >
>>> >
>>> > —
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>>>
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>>
>>
>>
>> —
>> Questions? First check the Kernel Driver FAQ at
>> http://www.osronline.com/article.cfm?id=256
>>
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>
>
>
> —
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I perused the available P4 Errata and Manual Updates, and nowhere it says
that the TSC is tied to the frontside bus. This would be a serious deviation
from the published spec, wouldn’t it ?
Alberto.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of J. J. Farrell
Sent: Wednesday, February 11, 2004 6:48 PM
To: Windows System Software Devs Interest List
Subject: Re:[ntdev] How to delay execution
“Moreira, Alberto” wrote in message
news:xxxxx@ntdev…
>
> The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> TSC:
>
> “Following reset, the counter is incremented every processor clock cycle,
> even when the processor is halted by the HLT instruction or the external
> STPCLK# pin.”
I believe that all implementations to date have counted the processor
clock. If I remember correctly, the architectural definition is along
the lines that it counts fairly quickly, and it is not possible for
two reads to return the same value (apart from wrap-around).
—
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and then destroy it.
Even easier, I can use SoftICE.
I have a 1.5Ghz single processor Dell Dimension 800. Clicking on “My
Computer\Manage\System Information” gives a processor speed of 1,495 Mhz.
Now, I enter two SoftICE “msr 10” commands separated by one minute. That’s
60 seconds.
Second reading: 59c_b5a9_b34c
First reading: 587_e96c_a078
Difference: 14_cc3d_12d4.
In decimal: 1,488,765,008
That’s jolly close to my processor rated clock speed. So, at least in this
machine, looks like the TSC beats with the processor clock. Moreover, I
asked the two writers of our two SoftICEs, and both of them agree with me
that the TSC beats with the processor clock.
Alberto.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Loren Wilton
Sent: Thursday, February 12, 2004 2:55 AM
To: Windows System Software Devs Interest List
Subject: Re: Re:[ntdev] How to delay execution
Easy enough to find out, isn’t it? RDTSC isn’t a privileged instruction.
Write a little 5-line program to read the value, wait 10 seconds, read it
again, divide by 10 and print the answer. The decide if 200e6 or whatever
is printed is the processor clock speed or the bus clock speed. You don’t
even need any particular amount of precision in that 10 second wait.
Sleep() will work just fine.
Loren
----- Original Message -----
From: “J. J. Farrell”
Newsgroups: ntdev
To: “Windows System Software Devs Interest List”
Sent: Wednesday, February 11, 2004 3:47 PM
Subject: Re:[ntdev] How to delay execution
>
> “Moreira, Alberto” wrote in message
> news:xxxxx@ntdev…
> >
> > The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> > TSC:
> >
> > “Following reset, the counter is incremented every processor clock
cycle,
> > even when the processor is halted by the HLT instruction or the external
> > STPCLK# pin.”
>
> I believe that all implementations to date have counted the processor
> clock. If I remember correctly, the architectural definition is along
> the lines that it counts fairly quickly, and it is not possible for
> two reads to return the same value (apart from wrap-around).
>
>
> —
> Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@earthlink.net
> To unsubscribe send a blank email to xxxxx@lists.osr.com
>
—
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and then destroy it.
Sorry, a detail: the “in decimal” line has it divided by 60. I forgot to
tell you guys.
Alberto.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Moreira, Alberto
Sent: Thursday, February 12, 2004 11:56 AM
To: Windows System Software Devs Interest List
Subject: RE: Re:[ntdev] How to delay execution
Even easier, I can use SoftICE.
I have a 1.5Ghz single processor Dell Dimension 800. Clicking on “My
Computer\Manage\System Information” gives a processor speed of 1,495 Mhz.
Now, I enter two SoftICE “msr 10” commands separated by one minute. That’s
60 seconds.
Second reading: 59c_b5a9_b34c
First reading: 587_e96c_a078
Difference: 14_cc3d_12d4.
In decimal: 1,488,765,008
That’s jolly close to my processor rated clock speed. So, at least in this
machine, looks like the TSC beats with the processor clock. Moreover, I
asked the two writers of our two SoftICEs, and both of them agree with me
that the TSC beats with the processor clock.
Alberto.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Loren Wilton
Sent: Thursday, February 12, 2004 2:55 AM
To: Windows System Software Devs Interest List
Subject: Re: Re:[ntdev] How to delay execution
Easy enough to find out, isn’t it? RDTSC isn’t a privileged instruction.
Write a little 5-line program to read the value, wait 10 seconds, read it
again, divide by 10 and print the answer. The decide if 200e6 or whatever
is printed is the processor clock speed or the bus clock speed. You don’t
even need any particular amount of precision in that 10 second wait.
Sleep() will work just fine.
Loren
----- Original Message -----
From: “J. J. Farrell”
Newsgroups: ntdev
To: “Windows System Software Devs Interest List”
Sent: Wednesday, February 11, 2004 3:47 PM
Subject: Re:[ntdev] How to delay execution
>
> “Moreira, Alberto” wrote in message
> news:xxxxx@ntdev…
> >
> > The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> > TSC:
> >
> > “Following reset, the counter is incremented every processor clock
cycle,
> > even when the processor is halted by the HLT instruction or the external
> > STPCLK# pin.”
>
> I believe that all implementations to date have counted the processor
> clock. If I remember correctly, the architectural definition is along
> the lines that it counts fairly quickly, and it is not possible for
> two reads to return the same value (apart from wrap-around).
>
>
> —
> Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@earthlink.net
> To unsubscribe send a blank email to xxxxx@lists.osr.com
>
—
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I have always got the the CPU speed when doing RDTSC til now,
but after following this thread I get the impression that doesn’t seem to
mean anything anymore.
On the PowerPc the time base counter increments relative to the bus clock
(1/4 on 603/604s).
Didn’t Jake do the PPC HAL a long time ago?
Robin Mitra
-----Original Message-----
From: Moreira, Alberto [mailto:xxxxx@compuware.com]
Sent: Donnerstag, 12. Februar 2004 17:56
To: Windows System Software Devs Interest List
Subject: RE: Re:[ntdev] How to delay executionEven easier, I can use SoftICE.
I have a 1.5Ghz single processor Dell Dimension 800. Clicking on “My
Computer\Manage\System Information” gives a processor speed
of 1,495 Mhz.Now, I enter two SoftICE “msr 10” commands separated by one
minute. That’s
60 seconds.Second reading: 59c_b5a9_b34c
First reading: 587_e96c_a078
Difference: 14_cc3d_12d4.
In decimal: 1,488,765,008That’s jolly close to my processor rated clock speed. So, at
least in this
machine, looks like the TSC beats with the processor clock.
Moreover, I
asked the two writers of our two SoftICEs, and both of them
agree with me
that the TSC beats with the processor clock.Alberto.
-----Original Message-----
From: xxxxx@lists.osr.com
[mailto:xxxxx@lists.osr.com]On Behalf Of Loren Wilton
Sent: Thursday, February 12, 2004 2:55 AM
To: Windows System Software Devs Interest List
Subject: Re: Re:[ntdev] How to delay executionEasy enough to find out, isn’t it? RDTSC isn’t a privileged
instruction.
Write a little 5-line program to read the value, wait 10
seconds, read it
again, divide by 10 and print the answer. The decide if
200e6 or whatever
is printed is the processor clock speed or the bus clock
speed. You don’t
even need any particular amount of precision in that 10 second wait.
Sleep() will work just fine.Loren
----- Original Message -----
From: “J. J. Farrell”
> Newsgroups: ntdev
> To: “Windows System Software Devs Interest List”
> Sent: Wednesday, February 11, 2004 3:47 PM
> Subject: Re:[ntdev] How to delay execution
>
>
> >
> > “Moreira, Alberto” wrote in message
> > news:xxxxx@ntdev…
> > >
> > > The Intel P4 Architecture Book, Vol 3, Section 14.7, says
> this about the
> > > TSC:
> > >
> > > “Following reset, the counter is incremented every processor clock
> cycle,
> > > even when the processor is halted by the HLT instruction
> or the external
> > > STPCLK# pin.”
> >
> > I believe that all implementations to date have counted the
> processor
> > clock. If I remember correctly, the architectural
> definition is along
> > the lines that it counts fairly quickly, and it is not possible for
> > two reads to return the same value (apart from wrap-around).
> >
> >
> > —
> > Questions? First check the Kernel Driver FAQ at
> http://www.osronline.com/article.cfm?id=256
> >
> > You are currently subscribed to ntdev as: xxxxx@earthlink.net
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> >
>
>
> —
> Questions? First check the Kernel Driver FAQ at
> http://www.osronline.com/article.cfm?id=256
>
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It would depend on how you read it. The processor clock *is* tied to the
FSB clock, it is just scaled from it by some random multiplier. And that
random multiplier, plus the question of just exactly what is a “processor
clock cycle” on an HT processor, are a couple of good reasons for it to be
tied to something marginally more stable.
But yes, I agree the wording can be improved.
Loren
----- Original Message -----
From: “Moreira, Alberto”
To: “Windows System Software Devs Interest List”
Sent: Thursday, February 12, 2004 8:15 AM
Subject: RE: [ntdev] How to delay execution
> I perused the available P4 Errata and Manual Updates, and nowhere it says
> that the TSC is tied to the frontside bus. This would be a serious
deviation
> from the published spec, wouldn’t it ?
>
> Alberto.
>
>
> -----Original Message-----
> From: xxxxx@lists.osr.com
> [mailto:xxxxx@lists.osr.com]On Behalf Of J. J. Farrell
> Sent: Wednesday, February 11, 2004 6:48 PM
> To: Windows System Software Devs Interest List
> Subject: Re:[ntdev] How to delay execution
>
>
>
> “Moreira, Alberto” wrote in message
> news:xxxxx@ntdev…
> >
> > The Intel P4 Architecture Book, Vol 3, Section 14.7, says this about the
> > TSC:
> >
> > “Following reset, the counter is incremented every processor clock
cycle,
> > even when the processor is halted by the HLT instruction or the external
> > STPCLK# pin.”
>
> I believe that all implementations to date have counted the processor
> clock. If I remember correctly, the architectural definition is along
> the lines that it counts fairly quickly, and it is not possible for
> two reads to return the same value (apart from wrap-around).
>
>
> —
> Questions? First check the Kernel Driver FAQ at
> http://www.osronline.com/article.cfm?id=256
>
> You are currently subscribed to ntdev as: xxxxx@compuware.com
> To unsubscribe send a blank email to xxxxx@lists.osr.com
>
>
>
> The contents of this e-mail are intended for the named addressee only. It
> contains information that may be confidential. Unless you are the named
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disclose
> it to anyone else. If you received it in error please notify us
immediately
> and then destroy it.
>
>
> —
> Questions? First check the Kernel Driver FAQ at
http://www.osronline.com/article.cfm?id=256
>
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