RAM memory mapped to PCI memory space

Hi all,

Operating System: Windows NT 4.0 SP 6

I allocated a contiguous zone of RAM memory. Is it possible to translate =
it in PCI memory space (an inverse function for =
HalTranslateBusAddress?!) and make it available for another PCI devices? =
More specifically, I have a PCI board with a MPC8240 processor on it =
which is doing NOTHING because it has no code to run yet. In MPC8240’s =
user manual it states that it is possible to fetch instruction(s?) from =
PCI memory space via an Outbound Window Translation operation. I don’t =
know how to allocate some memory of PCI memory space and make it =
available for MPC8240.

Any suggestion is welcome.

Thanks in advance,
Daniel


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If the MPC is operating in Agent mode (very likely) and depending on the
hardware design you can
do that. It’s fairly complex but you can start by reading the MPC8240 user
manual at section

7.7.4.3 Initialization Code Translation in Agent Mode

The user manual is available at

http://e-www.motorola.com/brdata/PDFDB/MICROPROCESSORS/32_BIT/POWERPC/MPC82XX/MPC8240UM.pdf

You need to be very up to date with PCI technology to achieve success here.
Also, one of the pins in the
MPC8240, I don’t remember which, should be activated to enable fetching
boot code from the PCI bus
at reset.

Good luck.

George Blat

At 07:17 PM 3/22/01 +0200, you wrote:

Hi all,

Operating System: Windows NT 4.0 SP 6

I allocated a contiguous zone of RAM memory. Is it possible to translate =
it in PCI memory space (an inverse function for =
HalTranslateBusAddress?!) and make it available for another PCI devices? =
More specifically, I have a PCI board with a MPC8240 processor on it =
which is doing NOTHING because it has no code to run yet. In MPC8240’s =
user manual it states that it is possible to fetch instruction(s?) from =
PCI memory space via an Outbound Window Translation operation. I don’t =
know how to allocate some memory of PCI memory space and make it =
available for MPC8240.

Any suggestion is welcome.

Thanks in advance,
Daniel


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George Blat
BRD Corp
8016 188th SW, Edmonds, WA 98026

phone: 425-775-7475
fax: 781-998-5940
mailto:xxxxx@brd.com
http://www.brd.com


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>You need to be very up to date with PCI technology to achieve success

here. Also, one of the pins in the
MPC8240, I don’t remember which, should be activated to enable fetching
boot code from the PCI bus
at reset.

I can’t imagine this would work, assuming we’re talking about “reset” to
mean computer system reset. There will be no memory loaded with code to
execute. If we’re talking about holding the device processor in a reset
state, and then initializing some memory with code, and initializing device
registers with the code’s address, and then letting the device processor
run, then ok. Either an OS device driver or system BIOS code could do this
(and I suppose this BIOS code could be on the card). Or, an embedded
computer that has ROM at specific addresses.

Or another option, the MPC8240 lives on it’s own PCI bus, with ROM
addressable at power on. A PCI-PCI bridge, activated later, could then
open a translated window between the local PCI bus and the computer PCI bus.

  • Jan

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At 04:25 PM 3/22/01 -0800, you wrote:

>You need to be very up to date with PCI technology to achieve success
>here. Also, one of the pins in the
>MPC8240, I don’t remember which, should be activated to enable fetching
>boot code from the PCI bus
>at reset.

I can’t imagine this would work, assuming we’re talking about “reset” to
mean computer system reset. There will be no memory loaded with code to
execute. If we’re talking about holding the device processor in a reset
state, and then initializing some memory with code, and initializing
device registers with the code’s address, and then letting the device
processor run, then ok. Either an OS device driver or system BIOS code
could do this (and I suppose this BIOS code could be on the card). Or, an
embedded computer that has ROM at specific addresses.

I assume more or less this alternative. The downside is that you keep the
peripheral in reset state until NT loads the driver, using time that could
be better used for a parallel
booting of the peripheral simultaneous with NT. As for the possibilities, I
extracted this from the MPC840 user manual:

7.7.4.3 Initialization Code Translation in Agent Mode
Since the processor always vectors to 0xFFF0_0100 after a hard reset, it
may be desirable
in some systems to fetch from an alternate or translated address space.
This allows a system
designer to place the initialization code at some alternate system memory
location such as
system main memory or alternate system ROM space. When configured for agent
mode,
outbound PCI address translation is used to accomplish this task.
The MPC8240 has the flexibility of being programmable from a remote host
controller. In
this case, the outbound translation window is set to map the local ROM
space to an alternate
system address. The following procedure must be followed to take advantage
of this
functionality:

  1. MPC8240 is configured for agent mode, with ROM located in PCI memory space.
  2. System performs a hard reset.
  3. The MPC8240 processor core fetches the hard reset exception vector, which is
    directed to the PCI bus. The transaction stalls and can not proceed until
    the PCI
    command register master enable bit is enabled.
  4. The system host controller initializes and configures the MPC8240 as an
    agent.
  5. The host must program PCSRBAR to locate the EUMB within PCI memory space.
  6. The host must set bit 1 of the PCI command register to enable MPC8240
    response
    to PCI memory accesses.
  7. The host programs the outbound translation window to contain the ROM
    space and
    the outbound translation base address to point to the location in system (PCI
    memory) space where the initialization code resides.
  8. The host then sets the PCI control register master enable bit in the
    MPC8240 to
    allow the local processor reset vector fetch (stalled in step 3) to
    initiate a read from
    the translated PCI location (as set up in step 7).
  9. The MPC8240 then completes the pending reset exception fetch from the
    translated
    system address and configures the local memory registers (described in
    Section 4.6,
    “Memory Interface Configuration Registers”) and the inbound translation
    registers
    (ITWR and LMBAR) as described in Section 3.3.3, “Address Translation
    Registers.”

As I don’t know how this design is intended to work, I cannot add much to
the picture.

Or another option, the MPC8240 lives on it’s own PCI bus, with ROM
addressable at power on. A PCI-PCI bridge, activated later, could then
open a translated window between the local PCI bus and the computer PCI bus.

I assume that the PCI bus is not local to the MPC8240. In other words, the
built-in bridge is used.

  • Jan

George


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Hi,

  1. The host programs the outbound translation window to contain the ROM
    space and
    the outbound translation base address to point to the location in system
    (PCI
    memory) space where the initialization code resides.

How can I obtain this PCI memory space? How can I allocate some RAM for the
bootloader and then make it available to my PCI device?

Daniel


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It’s a complex process. You’ll have to read very carefully the tables in
the MPC8240
user manual. Check chapters 4 and 7. Also, I recommend you that if possible
get in
touch with the hardware designers to see how is the glue logic around the
processor.
Some of what we say here are assumptions that may not be reflected in the
hardware.
One of them is that the board is going to run in “agent” mode, as opposed
to host mode.

Do you have a board already available or is it being designed?

Good luck,

George

At 06:23 PM 3/23/01 +0200, you wrote:

Hi,

> 7. The host programs the outbound translation window to contain the ROM
> space and
> the outbound translation base address to point to the location in system
(PCI
> memory) space where the initialization code resides.

How can I obtain this PCI memory space? How can I allocate some RAM for the
bootloader and then make it available to my PCI device?

Daniel


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Hi George ,

One of them is that the board is going to run in “agent” mode, as opposed
to host mode.

Do you have a board already available or is it being designed?

The board is available and MPC8240 is running in host mode at reset. It
seems
that finally we found out how to boot from the onboard-flash memory.
Therefore it
is not necessary to boot from PC’s memory.

Thanks a lot,
Daniel


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