Hello All,
I want to configure PCI based device (card) from device driver
so i want know about PCI bus enumeration and corresponding API available for
driver development
Thanks
Regards,
Pravin G.
WDM PnP driver can only access its PCI device which was handled to it by
the OS in AddDevice call, not the whole PCI bus.
Enumeration is done automatically by other Windows components.
–
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com
“pravin gawale” wrote in message
news:xxxxx@ntdev…
> Hello All,
>
> I want to configure PCI based device (card) from device driver
> so i want know about PCI bus enumeration and corresponding API available for
> driver development
>
> Thanks
>
> Regards,
> Pravin G.
>
How’s about the 0CF8/0CFC ports ?
This has been answered many times, it is a great way to mess up the system.
These are owned by the OS and you have no way of synchronizing with the
legal accesses. This creates the kind of nasty bugs that can take an
In-circuit-Emulator to find with many hours, and drives responsible
developers nuts.
–
Don Burn (MVP, Windows DDK)
Windows 2k/XP/2k3 Filesystem and Driver Consulting
Website: http://www.windrvr.com
Blog: http://msmvps.com/blogs/WinDrvr
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wrote in message news:xxxxx@ntdev…
> How’s about the 0CF8/0CFC ports ?
>
Don,
These are owned by the OS and you have no way of synchronizing with the legal accesses.
Actually, there is a way to do it, but it is really ugly in terms of implementation and expensive in terms of performance. Basically what you have to do is to turn your MP system into an UP one for the duration of your operation. Before you start your operation, you create system threads that run on all CPUs (apart from the one that does an operation, of course) that disable interrupts and spin in do-nothing while loop until, by setting a global flag, you indicate them that they can break out. At this point they re-enable interrupts on CPUs they run on, and terminate themselves…
Anton Bassov
Antom
NO THIS DOES NOT WORK. YOU ARE STILL NOT PROTECTING AGAINST THE OS
HAVING WRITTEN CF8 BUT THEN NOT ACCESSES CFC. Your driver comes along and
changes CF8 which can be write only in many implementations, the goes and
does its stuff, then when the OS comes back it writes to CFC blowing away
the system. This results in one of those nice itermmittent bugs that gets
blamed on one driver whrn it iis crap that is doing it.
–
Don Burn (MVP, Windows DDK)
Windows 2k/XP/2k3 Filesystem and Driver Consulting
Website: http://www.windrvr.com
Blog: http://msmvps.com/blogs/WinDrvr
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wrote in message news:xxxxx@ntdev…
> Don,
>
>> These are owned by the OS and you have no way of synchronizing with the
>> legal accesses.
>
> Actually, there is a way to do it, but it is really ugly in terms of
> implementation and expensive in terms of performance. Basically what you
> have to do is to turn your MP system into an UP one for the duration of
> your operation. Before you start your operation, you create system threads
> that run on all CPUs (apart from the one that does an operation, of
> course) that disable interrupts and spin in do-nothing while loop until,
> by setting a global flag, you indicate them that they can break out. At
> this point they re-enable interrupts on CPUs they run on, and terminate
> themselves…
>
> Anton Bassov
>
That’s right.
But if we will check something like pcscope tool we may find out they used those ports.
In my last projects I was enforced by motherboard vendor to use it for temperature meter “because of the bug in the chipset”.
By the way for PCI configuration may be used IRP_MN_READ_CONFIG
Yes and some of those tools have cause grief for others. I know of a
company that lost a multi-million doolar sale because things flaked out once
in a while and they were blames, turned out to be the computer vendor going
at the port directly. This one may hit the courts.
–
Don Burn (MVP, Windows DDK)
Windows 2k/XP/2k3 Filesystem and Driver Consulting
Website: http://www.windrvr.com
Blog: http://msmvps.com/blogs/WinDrvr
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wrote in message news:xxxxx@ntdev…
> That’s right.
> But if we will check something like pcscope tool we may find out they used
> those ports.
> In my last projects I was enforced by motherboard vendor to use it for
> temperature meter “because of the bug in the chipset”.
> By the way for PCI configuration may be used IRP_MN_READ_CONFIG
>
> But if we will check something like pcscope tool we may find out they used
those
ports.
Correct, it will hang sometimes, and this issue is even theoretically
unfixable.
In my last projects I was enforced by motherboard vendor to use it for
temperature
meter “because of the bug in the chipset”.
Normal way of exposing the temperature meters is using ACPI table as
ACPI_TemperatureProbe. Then a tiny VBScript app in Windows will be able to read
them.
By the way for PCI configuration may be used IRP_MN_READ_CONFIG
For your device only, not for all devices.
–
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com
Don,
NO THIS DOES NOT WORK.
Believe me or not, but it does - you will see it shortly…
YOU ARE STILL NOT PROTECTING AGAINST
THE OS HAVING WRITTEN CF8 BUT THEN NOT ACCESSES CFC.
Sure you do …
Which way??? Let’s think logically. The OS synchronizes an access to IO ports 0xCF8 and 0xCFC with a spinlock. It is understandable that both write to 0xCF8 and read from 0xCFC are made by the OS while spinlock in question is being held - otherwise, it would just defeat the purpose of protecting them with a spinlock, in the first place.
If you think about it very, very carefully, you are going to realize that, by the moment you start your IO access (I assume you have elevated IRQL to DPC level before you proceed to actual IO operation), no one in the entire system can be a spinlock holder. This applies not only the spinlock we are interested it - not a *single* spinlock may be held in the system by anyone at this moment. Therefore, all operation on the target IO ports have been completed, and the new ones cannot start until you complete yours - you are the only owner of the target resource at the moment…
Anton Bassov
That’s clear - if we can not make write/read an atomic operation - we are in danger.
And even if we can - we can not expect another driver will have it atomic.
And there is no way to have it atomic on dual CPU
But there are cases when there’s no choice to use it.
It seems PCI config reading is not that case
Except you cannot rely on it being a spinlock, IIRC it was not always.
Sorry people who do crap like this in anything close to a production driver
should have their fingers broken so thay cannot use a keyboard again.
–
Don Burn (MVP, Windows DDK)
Windows 2k/XP/2k3 Filesystem and Driver Consulting
Website: http://www.windrvr.com
Blog: http://msmvps.com/blogs/WinDrvr
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wrote in message news:xxxxx@ntdev…
> Don,
>
> > NO THIS DOES NOT WORK.
>
> Believe me or not, but it does - you will see it shortly…
>
>> YOU ARE STILL NOT PROTECTING AGAINST
>> THE OS HAVING WRITTEN CF8 BUT THEN NOT ACCESSES CFC.
>
> Sure you do …
>
> Which way??? Let’s think logically. The OS synchronizes an access to IO
> ports 0xCF8 and 0xCFC with a spinlock. It is understandable that both
> write to 0xCF8 and read from 0xCFC are made by the OS while spinlock in
> question is being held - otherwise, it would just defeat the purpose of
> protecting them with a spinlock, in the first place.
>
> If you think about it very, very carefully, you are going to realize that,
> by the moment you start your IO access (I assume you have elevated IRQL to
> DPC level before you proceed to actual IO operation), no one in the entire
> system can be a spinlock holder. This applies not only the spinlock we are
> interested it - not a single spinlock may be held in the system by
> anyone at this moment. Therefore, all operation on the target IO ports
> have been completed, and the new ones cannot start until you complete
> yours - you are the only owner of the target resource at the moment…
>
>
> Anton Bassov
>
>
Maxim, in my case ACPI_TemperatureProbe returns 0.
As I mentioned the motherboard vendor claimed there is a bug in the chipset and there is only way to get it - access pci configuration directly
> Maxim, in my case ACPI_TemperatureProbe returns 0.
You was working for a motherboard vendor? Why that vendor have not implement
the correct ACPI table?
–
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com
“Corraling” all CPUs in the same predictable loop within a DPC - as Anton
mentioned - is a help.
–
Maxim Shatskih, Windows DDK MVP
StorageCraft Corporation
xxxxx@storagecraft.com
http://www.storagecraft.com
wrote in message news:xxxxx@ntdev…
> That’s clear - if we can not make write/read an atomic operation - we are in
danger.
> And even if we can - we can not expect another driver will have it atomic.
> And there is no way to have it atomic on dual CPU
> But there are cases when there’s no choice to use it.
> It seems PCI config reading is not that case
>
No, it’s a motherboard developed for our product.
I don’t want provide a special “advertising” for the vendor. But they said there’s a problem to reach the sensor via SMBUS (and that’s true - I’ve tried)
> “Corraling” all CPUs in the same predictable loop within a DPC - as Anton mentioned - is a help.
Not really
As Don mentioned we can not be sure our driver did not interrupt another driver after it’s writing to 0cf8
pravin gawale wrote:
I want to configure PCI based device (card) from device driver
so i want know about PCI bus enumeration and corresponding API
available for driver development
You need to tell us more about what you want to do. The operating
system’s handling of PCI devices through the normal plug-and-play system
is very well documented, and backed up through numerous examples in the
DDK. Tell us exactly what is confusing you, and we can clear that up.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.
The IRP and BusInterface based methods are the only supported
mechanisms for reading coonfig space data. They do require you to be
in the PDO stack however. If you need access to config space for
devices you are not in the devnode stack of, you either end up with
the deprecated HalGetBusData, which at least knows how to acquire the
config space lock, or you can write a pci bus filter driver, which
Microsoft considers unsupported, but that will allow you to safely use
the IRP and BusInterface mechanisms.
On Jan 17, 2008 10:08 AM, wrote:
> That’s right.
> But if we will check something like pcscope tool we may find out they used those ports.
> In my last projects I was enforced by motherboard vendor to use it for temperature meter “because of the bug in the chipset”.
> By the way for PCI configuration may be used IRP_MN_READ_CONFIG
>
>
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Mark Roddy
xxxxx@gmail.com wrote:
That’s right.
But if we will check something like pcscope tool we may find out they used those ports.
Just because a technique is in use does not mean it is correct!
In my last projects I was enforced by motherboard vendor to use it for temperature meter “because of the bug in the chipset”.
Ditto. Just because the motherboard vendor recommends it doesn’t mean
it is correct.
By the way for PCI configuration may be used IRP_MN_READ_CONFIG
True, but I suspect the original poster is asking a question even above
this level.
–
Tim Roberts, xxxxx@probo.com
Providenza & Boekelheide, Inc.