Hi all,
this is a follow up to my topic “hardware Scatter/Gather table size”(http://www.osronline.com/showThread.cfm?link=263332) which has actually left the scope of its headline.
After deep investigation and consultation of the FPGA developer I am still hanging at the same point:
Something in my KMDF driver (or just in the Windows Kernel) seems to confuse the PCIe device.
I have setup a driver for my device on the same machine with Linux, working as known (the device is already in production for some years). When I do exactly the same (order of Reads/Writes on registers, setting up DMA), the result is mostly different compared to the Linux driver. In most cases, the PCIe-Core or the FPGA firmware is doing unexpected things or write operations to wrong addresses.
Now we have a new PCIe device that implements a similar behaviour. It uses completely different hardware (Xilinx Virtex-7 FPGA Gen3). And we experience similar mysteries. The Firmware shows bugs that never have been seen in the reference-Linux-Implementation.
I’ve tried using the macros READ_REGISTER_ULONG/WRITE_REGISTERULONG instead of direct read/write operations. Although this did not fix the problem, a slightly different behaviour could be seen. Then I added a simple dummy read operation to the write macro - also different behaviour but not actually good.
I’ve tried some more actions:
- Changed PC hardware
- Changed DMA memory area to be 32bit addressable
- Put all CommonBuffers into one page aligned buffer, made every block page aligned.
At this point I have no more ideas and one big question:
What can my driver possibly do or miss that can confuse 2 different hardware devices in 2 different PCs? Keeping in mind that the initialization sequence is exactly the same as in the linux driver.
Thanks a lot!