Max is right, as usual. But I would like to add a little bit to his
response.
While the OS-level protocol is the same for devices which use ports and
devices which use memory-mapped registers, the bus-level protocol isn’t.
Many PCI (and PCI-X, PCI-Express, etc.) chipsets have a less strict memory
ordering model for MMIO (memory mapped I/O) access.
If your interrupt is related to a DMA transaction, the interrupt may be
delivered to the processor before the data is coherent in main memory, which
means that the processor can read or write stale data in its ISR. You need
to be sure that your chipset’s bridge buffers are flushed before you count
on the data in memory from the DMA operation.
With port-mapped devices, a write to the device to clear the interrupt
status/enable registers (to stop the level-triggered interrupt) will usually
cause the bridge buffers to flush. (I’d like to say “always” but there are
a few chipsets that don’t quite get it right.)
With MMIO-mapped devices, you generally have to read back what you’ve
written to that register to cause the bridge buffers to flush, ensuring that
the DMA operation is now coherent in main memory. In practice, this often
doesn’t matter as there is usually some other register read that will occur
in the ISR, or the associated DPC.
This problem is becoming more historical now, as many interrupts are coming
to the local APIC as busmaster transactions (see MSI and MSI-X in the PCI
specs). This automatically flushes the DMA transaction, since the interrupt
follows the DMA and it takes the same form, a memory write.
–
Jake Oshins
Windows Kernel Group
The Virtual Machine Team at Microsoft is hiring. Contact
xxxxx@microsoft.com for more information.
This posting is provided “AS IS” with no warranties, and confers no rights.
“Maxim S. Shatskih” wrote in message
news:xxxxx@ntdev…
>> Is the taking in of the ‘interrupt resources’ from the pnp manager and
>> the
> isr
> hooking done in the ‘startdevice’ routine, the same for the two types of
> devices?
>>
>> Is the feeding in of the translated resources from the pnp manager to
>> the
> ‘IoConnectInterrupt’ routine the right way of doing interrupt hooking for
> port
> mapped drivers?
>
> Yes. Interrupt mapping does not depend on whether the device uses ports of
> memory registers.
>
> Maxim Shatskih, Windows DDK MVP
> StorageCraft Corporation
> xxxxx@storagecraft.com
> http://www.storagecraft.com
>
>
>