'interlocked' bit ops?

Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do I
need to create my own?

BTW: My driver set is (seemingly) working correctly now. I’m able to
send/receive packets and can ping remote machines under the Win7 checked
build.

There is still tons of work to do to harden and ‘productize’/sign,
however this is a good first step. I am deeply indebted to all of you
who answered my queries and put up with my occasional rants. Thank you
all so very much.

Best,
-PWM

> Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do I

need to create my own?

See all of the InterlockedXxx intrinsics (e.g. InterlockedAnd
http://msdn.microsoft.com/en-us/library/aa489848.aspx)

I’m not sure if these are defined for you by the NDIS headers or if you’ll
need to pull them in from elsewhere.

-scott


Scott Noone
Consulting Associate
OSR Open Systems Resources, Inc.
http://www.osronline.com

“Peter W. Morreale” wrote in message
news:xxxxx@ntdev…
>
> Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do I
> need to create my own?
>
> BTW: My driver set is (seemingly) working correctly now. I’m able to
> send/receive packets and can ping remote machines under the Win7 checked
> build.
>
> There is still tons of work to do to harden and ‘productize’/sign,
> however this is a good first step. I am deeply indebted to all of you
> who answered my queries and put up with my occasional rants. Thank you
> all so very much.
>
> Best,
> -PWM
>
>

On Tue, 2010-01-26 at 11:49 -0500, Scott Noone wrote:

> Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do I
> need to create my own?

See all of the InterlockedXxx intrinsics (e.g. InterlockedAnd
http://msdn.microsoft.com/en-us/library/aa489848.aspx)

I’m not sure if these are defined for you by the NDIS headers or if you’ll
need to pull them in from elsewhere.

Yep, missed it.

Thanks,
-PWM

Check out “NDIS Interlocked Functions Interface” topic in the WDK Help.

Larry C

> Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do I

need to create my own?

Why not? InterlockedOr is a macro, even for usual WDM.


Maxim S. Shatskih
Windows DDK MVP
xxxxx@storagecraft.com
http://www.storagecraft.com

On Tue, 2010-01-26 at 20:50 +0300, Maxim S. Shatskih wrote:

> Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do I
> need to create my own?

Why not? InterlockedOr is a macro, even for usual WDM.

How do I do a interlocked test_bit()?

Thx,
-PWM

I can use some advice. I thought that a word access(load or store) from
a word aligned address is a single op and so by itself,
It should be atomic without any need for lock prefix.

Regards
Harish

-----Original Message-----
From: Peter W. Morreale [mailto:xxxxx@novell.com]
Sent: Tuesday, January 26, 2010 10:33 AM
To: Windows System Software Devs Interest List
Subject: Re: Re:[ntdev] ‘interlocked’ bit ops?

On Tue, 2010-01-26 at 20:50 +0300, Maxim S. Shatskih wrote:

> Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do
I
> need to create my own?

Why not? InterlockedOr is a macro, even for usual WDM.

How do I do a interlocked test_bit()?

Thx,
-PWM


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at
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On Tue, 2010-01-26 at 10:52 -0800, Arora, Harish wrote:

I can use some advice. I thought that a word access(load or store) from
a word aligned address is a single op and so by itself,
It should be atomic without any need for lock prefix.

Regards
Harish

DOH! that’s right. Thanks!

Best,
-PWM

-----Original Message-----
From: Peter W. Morreale [mailto:xxxxx@novell.com]
Sent: Tuesday, January 26, 2010 10:33 AM
To: Windows System Software Devs Interest List
Subject: Re: Re:[ntdev] ‘interlocked’ bit ops?

On Tue, 2010-01-26 at 20:50 +0300, Maxim S. Shatskih wrote:
> > Are there ‘interlocked’ or atomic bit ops available in NDIS? Or do
I
> > need to create my own?
>
> Why not? InterlockedOr is a macro, even for usual WDM.
>

How do I do a interlocked test_bit()?

Thx,
-PWM


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at
http://www.osronline.com/page.cfm?name=ListServer


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at http://www.osronline.com/page.cfm?name=ListServer

Peter Morreale wrote:

How do I do a interlocked test_bit()?

By the time you act on the result of your test, couldn’t the bit have changed?

On Tue, 2010-01-26 at 15:16 -0500, xxxxx@gmail.com wrote:

Peter Morreale wrote:

> How do I do a interlocked test_bit()?

By the time you act on the result of your test, couldn’t the bit have changed?

Yes. I was not clear in my thinking and got myself confused.

THx
-PWM


NTDEV is sponsored by OSR

For our schedule of WDF, WDM, debugging and other seminars visit:
http://www.osr.com/seminars

To unsubscribe, visit the List Server section of OSR Online at http://www.osronline.com/page.cfm?name=ListServer

> I thought that a word access(load or store) from a word aligned address is a single op and so by itself,

It should be atomic without any need for lock prefix.

LOCK prefix is not meant to be used with loads and stores - if you check with Intel manual you will see a set of instructions that can be used with LOCK prefix, and notice that MOV is not among them…

It is meant to be used with operations that involve both reading and updating a variable in a single operations (test-and-set, compare-and-exchange, increment, decrement,etc). When you do this kind of operation you may want to lock the bus to ensure that no one sneaks in - otherwise you may get inconsistent results. LOCK prefix is designed for dealing with this kind of situation.

Concerning atomicity for loads and stores, these days they are guaranteed to be atomic as long as they don’t spread across the cache line boundary. Earlier processors (IIRC, pre-P6 family ones), indeed, required respectively word/dword-alignment in order to ensure atomicity of word/dword-sized loads and stores…

Anton Bassov