Hi,
I need to write a Windows driver for a TI PCI 2040 card. https://www.ti.com/lit/ds/symlink/pci2040.pdf?ts=1664452361225&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FPCI2040
This card has an odd functionality which unfortunately needs to be supported in the driver.
It features a couple of GPIOs which can only be accessed by reading and writing to the configuration space as shown in section 4.1 of the data sheet and further outlined in Section 4.22 through 4.24.
Since I don’t need DMA access I was hoping to get by with an UMDF driver but:
I haven’t found a way to read and write to configuration space from UMDF so far.
As only bus drivers usually need to do this all examples refer to these kind of KMDF drivers.
Any hint on how to write to configuration space for a certain PCI device?
Once upon a type we had a card where this was required. The hardware on the card took quite some time to initialize, and when the kernel driver tried to access the normal registers on the card before initialization had finished, this could make the computer hang. This could happen if the computer booted very fast after power-up.
So the kernel driver could either always wait for a worst case interval to make sure that the card was up and running, or there had to be a way for the driver to check if initialization had finished. In fact the on-board hardware flipped an otherwise unused flag in one of the registers of the configuration space, so the kernel driver could check that flag before it started to access the normal registers of the card.
the on-board hardware flipped an otherwise unused flag in one of the registers of the configuration space,
(Thanks Martin) Now THAT is a very reasonable use of configuration space. I like that use.
But I keep seeing designs that use reads/writes to configuration space in place of reads/writes to typical BARs. Like, to do I/O operations. One of these designed even came from a large semiconductor/processor manufacturer. I just don’t understand the motivation.