IOMMU - hardware or software?

I’ve been reading about IOMMU and APIs related to it and one thing remains unclear - is the IOMMU a pure software implementation of a concept, or is it actually implemented by a specific piece of hardware (like the MMU)?

IOMMU in itself is a hardware thing - it connects DMA-capable IO bus to the main memory and maps device-visible virtual bus addresses to the actual physical addresses exactly the same way CPU’s MMU maps virtual addresses to the physical ones.This is why one is supposed to use DMA handles (or whatever they call it in Windoze parlance), rather than physical addresses when setting up DMA transfers - if the target machine is equipped with IOMMU a bus address does not necessarily have to correspond to physical RAM one, although there is a direct correspondence between these two on “classical” x86-based system without IOMMU.

OTOH, the system may implement some IOMMU-like functionality in a software. For example, an ordinary 32-bit PCI device simply cannot address the memory above the 4 GiB boundary, although a 32-bit CPU that supports PAE extensions can access it . In order to work around this limitation the system may implement a so-called "bounce buffer"in a software

Anton Bassov

Got it, thanks for the informative answer.

In addition, the purpose of the software abstraction is so that ordinary drivers do not have to care whether a particular system on which they run is physically equipped with an IOMMU or not ? or whether it is, but there are too many other devices that also need these resources that they are unavailable for use.

The driver simply uses the software abstraction and on systems where the hardware exists and is available for use it is used; on systems where the hardware does not exists or is not available for use, a software implementation is used

The presence or absence of IOMMU hardware does not relate to the question of whether bus relative addresses must be used for any transfer as this relates only to the architecture of the bus itself

The use of bounce buffers applies to all DMA transactions and again has no direct relation to the presence or absence if IOMMU hardware. Any hardware based memory copy engine (this is what DMA and IOMMU do) that can only access 32-bit addresses, will require buffers within the 4 GB range to be used if the destination addresses are not within that memory range. Again the typical driver does not care about this as the system will do what is necessary transparently (except for performance of course)

In general IOMMU hardware is useful in limited scenarios. Most devices where performance is important have dedicated DMA hardware and most drivers for devices where performance is not important don?t care about it one way or another. There are of course exceptions.

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Subject: RE:[ntdev] IOMMU - hardware or software?

IOMMU in itself is a hardware thing - it connects DMA-capable IO bus to the main memory and maps device-visible virtual bus addresses to the actual physical addresses exactly the same way CPU’s MMU maps virtual addresses to the physical ones.This is why one is supposed to use DMA handles (or whatever they call it in Windoze parlance), rather than physical addresses when setting up DMA transfers - if the target machine is equipped with IOMMU a bus address does not necessarily have to correspond to physical RAM one, although there is a direct correspondence between these two on “classical” x86-based system without IOMMU.

OTOH, the system may implement some IOMMU-like functionality in a software. For example, an ordinary 32-bit PCI device simply cannot address the memory above the 4 GiB boundary, although a 32-bit CPU that supports PAE extensions can access it . In order to work around this limitation the system may implement a so-called "bounce buffer"in a software

Anton Bassov


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