RE: Question about the real time response!!!!

xxxxx@chinaren.com said:

I have developed a PCI card which will continuously interrupt every
6ms, and it is asked that none of the interrupt should be missed. When
I tested it with my driver on my HP LH3000 net server: PIII 533+128M
ram, it runs perfectly well without missing any interrupts, at least
till now

The “never miss interrupts” requirement is hopelessly unrealistic on
a general NT system, and it’s not necessarily NT’s fault. You are very
much at the mercy of:

* cheap/uncooperative commodity hardware that hogs the bus or CPU,

* sometimes less then perfect third party device drivers,

* and NT is not known for fast interrupt service times anyhow.

FWIW the worst offenders seem to be IDE and floppy subsystems, though
that may be getting better nowadays. And even an ideal system can have
sporadic performance when the load is high.

We design PCI cards ourselves and learned that interrupt response can
be bursty, and if flow isn’t controlled, you *will* miss some.

Steve Williams “The woods are lovely, dark and deep.
xxxxx@icarus.com But I have promises to keep,
xxxxx@picturel.com and lines to code before I sleep,
http://www.picturel.com And lines to code before I sleep.”

Yes that is one, but here is the one I was thinking of:

http://www.intel.org/ial/sm/usenix/index.htm

-----Original Message-----
From: Robert Kennett [mailto:xxxxx@sequest.com]
Sent: Tuesday, May 23, 2000 11:37 AM
To: NT Developers Interest List
Subject: [ntdev] RE: Question about the real time response!!!

I remember that paper! Even found the hard copy and a link.
Nice title anyway:

“The Problem You’re Having May Not Be The Problem You
Think You’re Having: Results from a Latency Study of Windows NT”

http://www.research.microsoft.com/~mbj/papers/tr-98-29.html

-bk

Roddy, Mark wrote:

> I think there was a paper about average interrupt latency
on NT systems that
> was published a year or two ago. I think also that it might
have been from
> Intel. You should do a web search. The worst case is of
course pretty horrid
> and undoubtedly outside the requirement that your isr
should never miss a
> 6ms interval. All that takes is a few concurrent interrupts
at higher
> priority with isrs that each consume a significant portion
of the 6ms. Hmm…
> perhaps the floppy disk driver would do it? NT is not a
real time system,
> and you have little or no control over the priority of your isr.
>
> > -----Original Message-----
> > From: Jingcao Hu [mailto:xxxxx@chinaren.com]
> > Sent: Tuesday, May 23, 2000 3:04 AM
> > To: NT Developers Interest List
> > Subject: [ntdev] Question about the real time response!!!
> >
> >
> > Hello Gurus,
> > I have developed a PCI card which will continuously
interrupt every
> > 6ms, and it is asked that none of the interrupt should be missed.
> > When I tested it with my driver on my HP LH3000 net server: PIII
> > 533+128M ram, it runs perfectly well without missing any
interrupts,
> > at least till now.
> > But now, my boss asked me to give him a theoretical
estimation of the
> > interrupt missing probability. I don’t know how to
calculate it. How
> > could I know in the worst case, how long will it take for my card
> > interrupt to issue the isr routine of my driver? How to
calculate the
> > probability?
> > Your help is highly appreciated.
> >
> >
> >
> >
> >
> > Best regards,
> > Jingcao mailto:xxxxx@chinaren.com


You are currently subscribed to ntdev as: xxxxx@stratus.com
To unsubscribe send a blank email to $subst(‘Email.Unsub’)

> I have developed a PCI card which will continuously interrupt every

6ms, and it is asked that none of the interrupt should be missed.
When I tested it with my driver on my HP LH3000 net server: PIII
533+128M ram, it runs perfectly well without missing any interrupts,
at least till now.
But now, my boss asked me to give him a theoretical estimation of the
interrupt missing probability. I don’t know how to calculate it. How
could I know in the worst case, how long will it take for my card
interrupt to issue the isr routine of my driver? How to calculate the
probability?

From personal experience:

  • NT4/SP6 running on P5/166 CPU is capable of servicing ~1600 interrupts
    per second (disk activity with 56K modem running) without losing any - no
    PPP frames are lost.
    But this is just as single fact.

I would advice to re-design the card if you want any guarantees.
For instance:

  • if an interrupting event occured, record it to some FIFO - in your device
    memory accessible by registers or in host’s memory using chain DMA.
    The second approach is generally better - FIFO size will be not so strictly
    limited.
  • then, if IRQ was not asserted yet - assert it.
    If the IRQ was already asserted - do not assert it, just put the record to
    the
    FIFO.
    Assert some “fatal error” bits on FIFO overflow.
    NT driver will a) queue a DPC and ping the card to deassert the IRQ in ISR
    b) scan the FIFO and handle all entries one by one in DpcForIsr.
    If the FIFO is host memory-based - the driver can use
    (Hal)AllocateCommonBuffer for it.

You can meet very, very strict realtime requirements if the card has a
precise
clock and is able to include the current clock counter’s value to the FIFO
records. And the card will not be chatty and have draconic ISR latency
requirements.

OHCI 1394 controller (a high-performance device with strict realtime
requiremenents) uses this technique (in chain DMA version) for all data
transfers.

Max