Taed:
When the PCI function is first scanned it presents to the BIOS the
size of the range of memory it offers to be addressed from the PCI
side (as oppossed to the local side). In English, it means how much
memory it requests to be visible by the main CPU. The pnp BIOS
replaces this value by the base address which you are trying to
read.
I would like to check that the BAR shows a real base address and not
the initial range request value. It is the BIOS task to replace RR
with the Base Address.
I hope this might help.
George
At 08:25 AM 5/6/00 -0700, you wrote:
> Are you sure that the physical memory is assigned to the same
> region. Is
> that runtime space pointed by BAR0 or BAR1?No, it isn’t the same address. That’s why I read the Base Address Register
first. Is there any other way of doing it? I thought that step was
required for PCI devices.> Alternatively, is it also available in I/O space?
Nope.
Another piece of data, though: It turns out that it works fine on the “bad”
motherboard if I ENABLE Plug-and-Play in the BIOS (which we disable by
default). Since the only PNP devices in the system are some “legacy” ISA
devices that have only fixed I/O at location 0x100, I don’t see how that
causes any issue. But that’s clearly the path I have to go down now…
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