Note that there is a separate IDT for every logical processor (core or
thread.) So the number of possible vectors for use in a quad-core
processor approaches 1000. The number in a two-socket quad-core
system approaches 2000, etc.
In practice, though, not all 224 vectors are truly usable. Windows
uses the Task Priority Register in the local APIC to store the current
IRQL, which means that the number of usable vectors is 0x10 times the
number of device IRQLs for a given HAL. (The x86 and x64 HALs are
structured a little differently.) This means that the number drops to
about 120 usable device vectors per core. This is still usually
enough, by the way, since the number of I/O devices in the machine is
trending downward and the number of cores is trending upward. Even
with MSI-X consuming a lot of vectors per device, there are usually
- Jake Oshins
Windows Interrupt Guy
wrote in message news:xxxxx@ntdev...
>> It was a component that attached to a north bridge. It contained
>> two PCI-X bridges and one
>> I/O APIC. Several machines were built that were capable of putting
>> one of these on an I/O
>> rack that was hot-plugged into the server.
> It looks like at some point in not-so-distant future the maximum of
> 255 vectors that x86 allows (in actuality, just 223 are available,
> because first 32 vectors are reserved for dealing with exceptions)
> may become quite a limitation - there is a good chance that some
> machines, particularly high-end servers ,may be forced to share
> interrupts not because of motherboard layout but because the number
> of vectors is limited....
> Anton Bassov