RE: [ntdev] RE: How often could I use KeQueryPerfomanceCounter functionThe
APIC timer has the same problem as the TSC. If you dynamically change the
frontside bus frequency, the frequency of the timer may change. The bigger
problem is that you can’t know for sure whether it will change.
The other problem with the APIC timer is that is works differently across
lots of chips, which makes it hard to rely on.
–
Jake Oshins
Windows Kernel Group
This posting is provided “AS IS” with no warranties, and confers no rights.
“Bi Chen” wrote in message news:xxxxx@ntdev…
Hi, Jacks:
>KeQPC is far more appropriate for creating timestamps for events. It’s
>actual cost is usually one or two “in” instructions. That will cause
>some I/O bus serialization, but not much.
Why KeQPC does not read APIC timer, which does not need in/out round trip to
southbridge? By the way, is it OK for driver to program APIC timer/counter
as a faster way to get time stamp?
>The multi-processor
>implemenations of it just read the internal Time Stamp Counter, though
>that approach won’t last much longer, since the introduction of Intel’s
>HyperThreaded processors will bring processor power management into
>multi-processor systems, making the TSC less useful.
Could you elaborate more? When processor does performance throttling by
changing clock frequecey, will that affect TSC? Is this the reason?
Thanks.
Bi