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I'm not a windows driver developer so I'm here to ask you a suggestion.
I've developed a FPGA based system. It exchange information using a Gigabit NIC.
It can run in a couple a ways: RAW Ethernet or UDP packets.
The FPGA system generate a packet and sent it to the PC. The PC has to read the packet, does some math and reply this packet as faster as possible. Each packet payload contains FPGA to PC data and vice-versa. Also each packet header contains a unique ID, and some useful stats like the "flyback" time. The flyback time is the time that the PC takes to reply to the packet with id N.
Packets payload is almost 350 bytes.
Packets rate should be at least 2kHz, nice to have 10kHz.
We are currently use a client software written in windows using National Instruments PCIe board with NI drivers. We are building a new electronic.
The client software is written in windows, so I can not simply go to Linux with RT.
NPCap is simply not fast enough, the flyback time at 1kHz is not stable enough it goes up and low from 100us to more than 1ms.
For this reason I'm thinking about writing a kernel driver.
This driver should:
1 - get the packet
2 - deparse the packet
3 - move the packet to user area (copying to GUI client memory?)
4 - read back the computed packet (from memory?)
5 - parse the packet
6 - send the packet back
At first stage the step 3 and 4 can be embedded in the driver as a simple loopback.
I'm looking at NDIS proto sample, and at the WSK echo sample.
Because I'm really out of this kind of development, before starting experimentation I would like to ask you suggestions.
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