I have a special need to queue DPC to specific CPUs from my ISR which always happens on CPU #0. It is a feature/bug of my HW. It is a networking device I have implemented in my FPGA.
My driver is a NDIS miniport driver (I also have an intermediate driver but that is more for debug that my customers can use).
Driver calls NdisMRegisterInterruptEx() successfully and gets back the IO_INTERRUPT_MESSAGE_INFO_ENTRY structures (as part of IO_INTERRUPT_MESSAGE_INFO) when this function returns.
Driver squirrels away this information.
When the time comes to schedule the DPC, I am using NdisMQueueDpcEx from the ISR.
This function is prototyped as follows and this is prototyped as follows
[in] IN NDIS_HANDLE NdisInterruptHandle,
[in] IN ULONG MessageId,
[in] IN PGROUP_AFFINITY TargetProcessors,
[in] IN PVOID MiniportDpcContext
Documentation for this document says MessageId is the index into IO_INTERRUPT_MESSAGE_INFO_ENTRY structure that matches the CPU I want to DPC to.
My system has multiple processor groups each of which has 64 CPUs.
My question is how do I find the index into IO_INTERRUPT_MESSAGE_INFO_ENTRY array matching my target processors since the IO_INTERRUPT_MESSAGE_INFO_ENTRY has no Group field. It just has a TargetProcessorSet (in my case each MessageId targets only one CPU) which is just 64-bits.
As an example, I have the index of the processor I want to send to so I get its GROUP, NUMBER but when I walk through the array of IO_INTERRUPT_MESSAGE_INFO_ENTRY, since there is no group number I am curious what index to use?.