Understanding MessageID part of ISR

Hi All,
I am a little unclear about the second parameter [MessageID] of the interrupt service routine

BOOLEAN EvtWdfInterruptIsr(
[in] WDFINTERRUPT Interrupt,
[in] ULONG MessageID
)

Lets say I am setting a device for a MSI-X interrupts. So to raise a MSI-X the device will send “data-X” as a posted write to some address in the APIC’s address range.
The address and the data-X are part of PCIe configuration when the MSI-X is configured.

I am interested in “data-X”.

  1. Who configures data-X? I believe it should be the OS but I am not sure. If the OS has assigned 32 messages to the device, will data-X be 0-31, identifying each message?
  2. Is the MessageID the data-X that the device writes to raise the interrupt?

Any help is highly appreciated.

AJ -

For the sake of the archives, I’ll address both MSI and MSI-X here… in spite of the fact that you only asked about MSI-X.

For MSI you get one Interrupt Resource and multiple messages. You need to call WdfInterruptCreate for each MESSAGE. You can connect the same ISR or different ISRs. All the ISRs will have the same IRQL. You distinguish these interrupts using the MessageID passed into your ISR. The first message is Message ID 0, the next is Message ID 1, etc. This corresponds with the sequential message ID that you use on your device.

For MSI-X you get one Interrupt Resource per interrupt that’s granted to you. You need to call WdfInterruptCreate for each interrupt resource (obviously). The Interrupt Resources will have different IRQLs. Like for MSI, the MessageID parameter will be the zero-based message index, allowing you to distinguish between different interrupt sources.

For both types of interrupt: On your device, to generate an interrupt you add the sequential message ID to the Message Data field of the PCI MSI Capability, and write that data it to the provided Message Address field in the PCI MSI Capability. For MSI the sequential number will be 0, 1, 2… through the max number of MSIs you support. The Message Address and Message Data values are set into the capability by some combination of the BIOS and the OS. In any case, it’s none of your business in the driver.

Does that helps? The documentation on MSI/MSI-X really sucks, because it was written back in the days of Vista… and how this works in practice wasn’t well understood by anyone except the guy who wrote the MSI code. I wrote the original Microsoft White Paper on support for MSI, and when I did so I had never written a driver that had an MSI or MSI-X… so, some of the specific and useful implementation details might have been, ah, a bit, ah, “less than precise or clear.” That lack of clarity continues in the docs to this day, so by writing all this detail now (after I’ve had some significant experience with both MSI and MSI-X I am, at least in part, attempting to atone for my past sins :wink: ).

Peter

ETA: I’m not sure, on the device side, exactly WHAT you write to the Message Address using Message Data for MSI-X – I know that you can use the address or the data value to “steer” the interrupt to a specific CPU or something. But I’ve never actually seen this FPGA (Verilog) code. In any case, that’s “not my job”… I’m over here on the host side, receiving these interrupts. PGV

ETA: Fixed incorrect info about MSI-X, per Mr. @msr in this thread. Thank you Mr. msr.

1 Like

Peter,
This description should be the part of the MSFT documents. This is really great and exactly that I was looking for.
Thanks again.

  • AJ