How to change intel PCH's I2S output format?

NTDEV
1

The iSST driver makes Intel PCH as I2S Master and output TDM audio data (48KHz, 2 lanes, 24bit sampling) as default. I want to change it to I2S Slave and output standard I2S (non-TDM) data(48KHz, 2 lanes, 24bit sampling).Now I found in PC’s BIOS code the I2S configuration array which specifies the I2S format as follows:
// I2S/SSP Configuration BLOBs
// Audio Format and Configuration details
//
// Frequency: 48kHz, PCM resolution: 24 bits
// TDM slots: 4
// Codec: Realtek ALC274, mode: slave
CONST UINT32 I2sRtk274Render4ch48kHz24bitFormatConfig =
{0x0,//gtw_attr
0xffffff10, 0xffffff32, 0xffff3210,0xffff3210,//tdm_ts_group
0xffff3210, 0xffff3210, 0xffff3210,0xffff3210,//tdm_ts_group
0x83d00737, 0xc0700000, 0x0, // ssc0, ssc1, sscto
0x02010004, 0xf, 0xf, 0x4002, // sspsp, sstsa, ssrsa, ssc2
0x4, 0x7070f00, 0x20, // sspsp2, ssc3, ssioc
0x00020001, //mdivctrl
0x00000002}; // mdivr

This above array’s structure is defined as :
// struct skl_i2s_config_blob_legacy - Structure defines I2S Gateway configuration legacy blob
// @gtw_attr: Gateway attribute for the I2S Gateway
// @tdm_ts_group: TDM slot mapping against channels in the Gateway.
// @i2s_cfg: I2S HW registers
// @mclk: MCLK clock source and divider values
struct skl_i2s_config_blob_legacy {
u32 gtw_attr;
u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS];
struct skl_i2s_config i2s_cfg;
struct skl_i2s_config_mclk mclk;
};

The skl_i2s_config i2s_cfg and skl_i2s_config_mclk is defined as:
struct skl_i2s_config {
u32 ssc0;
u32 ssc1;
u32 sscto;
u32 sspsp;
u32 sstsa;
u32 ssrsa;
u32 ssc2;
u32 sspsp2;
u32 ssc3;
u32 ssioc;
} __packed;

struct skl_i2s_config_mclk {
u32 mdivctrl;
u32 mdivr;
};

As far as I know, the ssc0, ssc1 ssioc are intel PCH’s HW registers congiguration value. I dont know how to configure those registers to acheive certain I2S output format, Can anyone help me? Thank you very much.

2

All of the PCH chipsets have freely available reference manuals that can tell you all of these. You need to go to Intels web site and look up your chipset.

By the way, you cannot assume that all PCH chipsets are identical.

3

@Tim_Roberts said:
All of the PCH chipsets have freely available reference manuals that can tell you all of these. You need to go to Intels web site and look up your chipset.

By the way, you cannot assume that all PCH chipsets are identical.

I find the PCH manal, but I can not find the corresponding description in them.

4

@Tim_Roberts said:
All of the PCH chipsets have freely available reference manuals that can tell you all of these. You need to go to Intels web site and look up your chipset.

By the way, you cannot assume that all PCH chipsets are identical.
I find the PCH manal on line, but I can not find the corresponding description in them. Can you point me out?

Here is the manal:
https://edc.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/comet-lake-u/intel-400-series-chipset-on-package-platform-controller-hub-register-database/introduction_1/

5

I find the PCH manual…

There’s no such thing as “THE” PCH manual. Each chipset has its own manual. You’re looking at the Comet Lake chipset PCH manual. The registers you cited are in the Skylake chipset (hence the “skl” prefix on the structures). They aren’t the same. As I pointed out, each generation of PCH is slightly different from the others.

6

@Tim_Roberts said:
There’s no such thing as “THE” PCH manual…
I searched all over the internet, and can not find the intel i2s register configuration documents. We also asked intel, but they refused to support us as they think i2s is too old (they think HDA or soundwire bus is new).

so can any one provide me such intel i2s configuration documents? or tell me how to configure those ssc0, ssc1… etc.

Thanks.

7

Then I suspect you are screwed.