Hi Sir/Madam,
This is a sw eng of a USB XHCI IP company.
recently, our hardware eng implement the xhci host debug cap per xchi spec 7.6.
But the debug cap could not be enabled by sw/os-driver/bios (i am not sure which one is responsible for initialize and then enable the debug cap)
We have setup a pc for usb debug target test(accroding to the steps from Windbg help file), currently, on the same pcie slot, we found that the 3rd party host’s debug cap could be enable by sw/os-driver/bios, but only our company’s host’s debug cap could not be enabled.
We capture a PCIe trace for this senario:
for the 3rd party hosts, sw/os-driver/bios, do some sw initialize, such as transfer-rings, and the enable the debug cap by write 1 to DCE bit.
but for our host, sw/os-driver/bios do not do any initialize neither write 1 to DCE bit.
Our xhci ext cap have be implement correctly, as the sw/os-driver/bios have found the ext cap by the pointer and one by one till the end of the ext cap.